GaN HEMT Gate Doping Profiles for Normally-Off Low On-Resistance
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Solution Overview
Problem
High-electron-mobility transistors (HEMTs) using nitride semiconductors face a trade-off between achieving a sufficient threshold voltage for normally-off operation and minimizing on-resistance, where increasing threshold voltage often leads to increased on-resistance.
Innovation Solution
A nitride semiconductor device structure is implemented with an electron transit layer, an electron supply layer, and a gate layer, where the gate layer includes zinc and magnesium acceptor impurities with distinct concentration profiles, facilitating the depletion of two-dimensional electron gas under the gate layer to enhance threshold voltage while limiting on-resistance increases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the threshold voltage of the HEMT is increased to ensure normally-off operation, then the reliability is improved, but the on-resistance increases
Solution Approach 1:
The patent applies local quality by creating a gate layer with non-uniform acceptor impurity concentration distribution. The zinc and magnesium impurities are distributed with different concentration profiles in the thickness-wise direction, creating regions with different electrical properties within the same gate layer. This allows localized enhancement of threshold voltage without uniformly increasing on-resistance across the entire device.
Solution Approach 2:
The patent changes the concentration parameters of acceptor impurities (zinc and magnesium) in the gate layer to optimize device performance. By adjusting the concentration profiles of these impurities, the patent achieves a balance between threshold voltage and on-resistance, resolving the technical contradiction between reliability and harmful factors.
2Reliability
If a p-type GaN layer with acceptor impurity is used to achieve normally-off operation, then the threshold voltage is improved, but the on-resistance increases
Solution Approach 1:
The patent uses a composite approach by combining multiple acceptor impurities (zinc and magnesium) in the gate layer. This composite doping strategy creates a more effective control over the 2DEG depletion characteristics, achieving better threshold voltage enhancement with less impact on on-resistance compared to using a single impurity type.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The nitride semiconductor device effectively increases the threshold voltage while maintaining low on-resistance, ensuring reliable normally-off operation and improved performance in high-electron-mobility transistors.
Implementation Method 1
The acceptor impurity included in the p-type GaN layer causes the channel in the electron transit layer to disappear from the region immediately below the gate electrode
Implementation Method 2
The GaN layer and the AlGaN layer form a heterojunction. A two-dimensional electron gas (2DEG) is formed as a channel in the GaN layer in the vicinity of the heterojunction interface
Data Source
AI summary
A nitride semiconductor device includes: an electron transport layer constituted by a nitride semiconductor; an electron supply layer formed on the electron transport layer and constituted by a nitride semiconductor that has a larger band gap than the electron transport layer; a gate layer formed on the electron supply layer and constituted by a nitride semiconductor that has a smaller band gap than the electron supply layer and includes an acceptor impurity; a gate electrode formed on the gate layer; and a drain electrode and a source electrode in contact with the electron supply layer. The acceptor impurity includes zinc and magnesium, and the concentration profile of the zinc in the thickness direction of the gate layer is different from the concentration profile of the magnesium in the thickness direction of the gate layer.