GaN HEMT Gate Protection Layer Sidewall Leakage
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Solution Overview
Problem
GaN enhancement mode transistors face challenges due to high sidewall trap levels and damage to the p-GaN cap during metal gate formation, leading to current leakage and unreliable threshold voltage uniformity, as determined by high temperature gas bias and reverse bias tests.
Innovation Solution
A gate protection layer, typically made of dielectric materials like aluminum nitride or aluminum oxide, is applied along the sidewalls and bottom surface of the p-GaN cap between the metal gate and the p-GaN cap to prevent current leakage and protect the cap from damage during processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a metal gate is formed directly on the p-GaN cap, then the transistor structure is simpler and manufacturing is easier, but the p-GaN cap suffers damage during processing and high sidewall trap levels cause current leakage
Solution Approach 1:
An aluminum nitride layer is introduced as an intermediary between the metal gate and the p-GaN cap. This intermediate layer protects the p-GaN cap from damage during metal gate formation processing, preventing sidewall trap generation while maintaining structural integrity and threshold voltage uniformity.
2Reliability
If the gate protection layer is made thicker, then protection against damage and current leakage is improved, but the device complexity and processing difficulty increase
Solution Approach 1:
The aluminum nitride layer is optimized with specific thickness parameters (typically 5-50 nm) to achieve effective protection against current leakage and damage while maintaining manageable device complexity. This parameter optimization balances protection efficacy with processing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The gate protection layer reduces sidewall trap levels, decreases leakage current, and improves threshold voltage uniformity and device reliability, as evidenced by enhanced performance in high temperature gas bias and reverse bias tests.
Implementation Method 1
A gate protection layer is arranged along sidewalls of the doped GaN cap and arranged below the gate between opposing surfaces of the gate and the doped GaN cap
Data Source
AI summary
A high-electron mobility transistor (HEMT) device employing a gate protection layer is provided. A substrate has a channel layer arranged over the substrate and has a barrier layer arranged over the channel layer. The channel and barrier layers define a heterojunction, and a gate structure is arranged over a gate region of the barrier layer. The gate structure includes a gate arranged over a cap, where the cap is disposed on the barrier layer. The gate protection layer is arranged along sidewalls of the cap and arranged below the gate between opposing surfaces of the gate and the cap. Advantageously, the gate protection layer passivates the gate, reduces leakage current along sidewalls of the cap, and improves device reliability and threshold voltage uniformity. A method for manufacturing the HEMT device is also provided.