GaN HEMT Si Oxide Buffer Layer Ga-Si Reaction Suppression
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Solution Overview
Problem
The challenge in manufacturing GaN-based high-electron mobility transistors (HEMTs) is the difficulty in suppressing the reaction between Ga and Si, which degrades the breakdown voltage due to lattice distortion and carrier generation at the interface between the AlN buffer layer and the Si substrate, despite the formation of an AlN layer.
Innovation Solution
A Si oxide layer is formed between the AlN nucleation layer and the Si substrate, preventing direct contact and thereby suppressing the reaction between Ga and Si, and enhancing the breakdown voltage by eliminating the interface between the AlN layer and the Si substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If an AlN layer is formed as a buffer layer to prevent Ga-Si reaction, then the reaction between Ga and Si is suppressed, but carriers are generated at the AlN-Si interface which degrades breakdown voltage
Solution Approach 1:
A Si oxide layer is introduced as an intermediary between the Si substrate and the AlN buffer layer. This intermediate layer prevents direct contact between AlN and Si, eliminating the harmful interface while maintaining the protective function against Ga-Si reaction. The Si oxide layer acts as a mediator that resolves the contradiction by providing both protection and electrical isolation.
Solution Approach 2:
The structure employs a composite buffer system consisting of multiple layers (Si oxide layer + AlN layer) rather than a single material. This composite approach combines the protective properties of AlN against Ga-Si reaction with the electrical isolation properties of Si oxide, achieving both suppression of harmful reactions and prevention of carrier generation at interfaces.
2Ease of manufacture
If GaN layer is grown directly on Si substrate, then manufacturing is simplified, but lattice distortion occurs due to difference in lattice constants which induces piezo polarization
Solution Approach 1:
A nucleation layer is formed preliminarily on the Si substrate before growing the GaN layer. This preliminary layer serves as a preparation step that addresses the lattice mismatch issue in advance, providing a suitable foundation for GaN growth that reduces lattice distortion and maintains crystallinity while keeping the overall process compatible with Si substrate manufacturing.
3Object-affected harmful factors
If AlN layer is formed to suppress Ga-Si reaction, then reaction suppression is improved, but manufacturing precision is reduced due to insufficient suppression and interface issues
Solution Approach 1:
The Si oxide layer serves as an intermediary that completely eliminates the problematic AlN-Si interface. By placing Si oxide between AlN and Si substrate, the design ensures no direct interface between AlN and Si, thereby achieving both effective reaction suppression and high interface quality without the drawbacks of the conventional single-layer approach.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The Si oxide layer effectively suppresses unintended carrier generation and reaction between Ga and Si, improving the breakdown voltage and maintaining the crystallinity of the GaN layer, thus enhancing the performance of GaN-based HEMTs.
Implementation Method 1
A Si oxide layer is formed between the AlN nucleation layer and the Si substrate, preventing direct contact and thereby suppressing the reaction between Ga and Si
Implementation Method 2
oxidizing a surface of the Si substrate through the opening so as to form a Si oxide layer
Data Source
AI summary
An embodiment of a compound semiconductor device includes: a Si substrate; a Si oxide layer formed over a surface of the Si substrate; a nucleation layer formed over the Si oxide layer, the nucleation layer exposing a part of the Si oxide layer; and a compound semiconductor stacked structure formed over the Si oxide layer and the nucleation layer.