GaN HEMT Substrate Vacancies to Reduce High-Frequency Coupling

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Solution Overview

Problem

High-frequency coupling effects in high electron mobility transistors (HEMTs) lead to reduced device performance, particularly in GaN HEMTs used in mobile phones, satellite TVs, and radars.

Innovation Solution

A semiconductor structure with insulating vacancies and through holes in the substrate, where a conductive layer is formed to electrically connect the semiconductor device, reducing high-frequency coupling by grounding the source through the conductive layer and positioning insulating vacancies below the channel layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional substrate structure is used in GaN HEMT, then device performance is maintained, but high-frequency coupling effects reduce performance

Engineering Contradiction:
Improvedevice performanceVSAvoidhigh-frequency coupling effect
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the harmful coupling effect by removing substrate material to create insulating vacancies beneath the channel layer. These vacancies eliminate the parasitic capacitance between the channel and substrate, directly addressing the high-frequency coupling problem while maintaining device performance.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces insulating vacancies (porous structure) in the substrate beneath the channel layer. These vacancies act as insulating regions that block the coupling path between the channel and substrate, reducing high-frequency coupling effects without affecting other device functions.

Inventive Principle:
Principle #31Porous materials

2Object-affected harmful factors

If insulating vacancies and through holes are formed separately, then high-frequency coupling is reduced, but process complexity and cost increase

Engineering Contradiction:
Improvehigh-frequency coupling effectVSAvoidprocess complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the formation of insulating vacancies and through holes into a single etching process step. By using a unified process to create both features, the patent reduces process complexity and manufacturing cost while achieving the same electrical isolation effect that would otherwise require separate processing steps.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12610808B2Semiconductor structure including insulating vacancy for improving operation performance and method of fabricating the same
Publication Date: 2026.04.21 IND TECH RES INST
  • US12610808B2 patent drawing
  • US12610808B2 patent drawing
  • US12610808B2 patent drawing

AI summary

A semiconductor structure including a substrate, a conductive layer, and a semiconductor device is provided. The substrate includes a first surface, a second surface opposite to the first surface, at least one insulating vacancy extending from the first surface toward the second surface, and a through hole passing through the substrate. The conductive layer fills in the through hole. The semiconductor device is disposed on the second surface and is electrically connected to the conductive layer, and the at least one insulating vacancy is distributed corresponding to the semiconductor device.