Normally Off GaN HFET Floating Gate
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Solution Overview
Problem
Conventional gallium nitride (GaN) based field effect transistors (FETs) face challenges in achieving a normally-off configuration with simple and convenient manufacturing and operation, as they typically operate in a normally-on mode requiring a pinch-off voltage to turn off, leading to increased power consumption and complex device control, and existing enhancement mode devices suffer from high on-resistance and reliability concerns.
Innovation Solution
The implementation of a heterostructure field effect transistor (HFET) with a negatively charged floating gate or gate oxide layer that depletes the channel without applying a voltage to the gate, using techniques similar to flash memory processes, allowing the device to operate as a normally-off device by shifting the pinch-off voltage and maintaining low on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional GaN-based FETs are configured as normally-on mode, then high electron mobility is achieved, but additional power consumption occurs due to continuous application of pinch-off voltage to turn off the transistor
Solution Approach 1:
The patent applies preliminary action by pre-charging the floating gate with negative charge during manufacturing, which automatically depletes the channel and turns off the device without requiring continuous external voltage. This preliminary charging action eliminates the need for continuous power consumption to maintain the off state.
Solution Approach 2:
The floating gate acts as an intermediary element between the control gate and the channel. By introducing this intermediate charged layer, the patent enables automatic channel depletion without direct continuous voltage application, thereby reducing power consumption while maintaining control capability.
2Reliability
If conventional GaN-based FETs use AlGaN/GaN hetero-junction structure, then high electron mobility is achieved, but the device operates in normally-on mode requiring complex control processes
Solution Approach 1:
The floating gate is pre-charged with negative charge during the manufacturing process, which automatically creates a depleted channel state at device initialization. This preliminary action simplifies device control by eliminating the need for complex voltage sequencing to achieve the off state.
Solution Approach 2:
The charged floating gate enables the device to self-regulate its channel state without requiring complex external control circuits. The built-in charge on the floating gate automatically maintains the normally-off state, allowing the device to serve itself in terms of control simplicity.
3Ease of operation
If enhancement mode devices are implemented to achieve normally-off operation, then device control is simplified, but on-resistance increases and reliability concerns arise
Solution Approach 1:
The floating gate serves as an intermediary that enables normally-off operation without the drawbacks of conventional enhancement mode devices. By using the charged floating gate to deplete the channel, the patent achieves low on-resistance comparable to normally-on devices while maintaining the simplicity of normally-off control.
Solution Approach 2:
The patent changes the electrical parameter of the floating gate by charging it with negative charge, which fundamentally alters the device operation mode from normally-on to normally-off without requiring thick oxide layers or other structural modifications that would increase on-resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the HFET to function as a normally-off device without external gate voltage application, improving manufacturing simplicity and reducing power consumption while maintaining high electron mobility and reliability, addressing the limitations of conventional GaN-based FETs.
Implementation Method 1
bonding two different kinds of semiconductor materials with different band gaps. A two dimensional electron gas (2DEG) layer is generated at the interface thus serving as a current path comprising a flow of electrons in this electron gas layer
Implementation Method 2
a floating gate which is charged for continuously applying a voltage to the 2DEG layer to pinch off the current flowing in the 2DEG layer
Data Source
AI summary
A heterostructure field effect transistor (HFET) gallium nitride (GaN) semiconductor power device comprises a hetero junction structure comprises a first semiconductor layer interfacing a second semiconductor layer of two different band gaps thus generating an interface layer as a two-dimensional electron gas (2DEG) layer. The power device further comprises a source electrode and a drain electrode disposed on two opposite sides of a gate electrode disposed on top of the hetero junction structure for controlling a current flow between the source and drain electrodes in the 2DEG layer. The power device further includes a floating gate located between the gate electrode and hetero junction structure, wherein the gate electrode is insulated from the floating gate with an insulation layer and wherein the floating gate is disposed above and padded with a thin insulation layer from the hetero-junction structure and wherein the floating gate is charged for continuously applying a voltage to the 2DEG layer to pinch off the current flowing in the 2DEG layer between the source and drain electrodes whereby the HFET semiconductor power device is a normally off device.