Self-Aligned Isolation in GaN Devices via Metal Mask Etching
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Solution Overview
Problem
Conventional manufacturing methods for GaN semiconductor devices require dedicated masks and additional process steps to form isolation areas, increasing fabrication costs and complexity.
Innovation Solution
A self-aligned isolation region is formed by using a metal mask window and contact opening, eliminating the need for a dedicated isolation mask and associated process steps, with a method involving a dielectric layer, metal layer deposition, and selective etching to define isolation areas without a dedicated mask.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional manufacturing methods use dedicated masks and additional process steps to form isolation areas, then isolation effectiveness is achieved, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent combines the isolation area formation with the existing contact opening formation process. The same dielectric layer openings and metal layers used for electrical contacts also define the isolation areas, eliminating the need for separate dedicated isolation masks and process steps. This merging of functions reduces process complexity while maintaining isolation effectiveness.
Solution Approach 2:
The dielectric layer openings and metal layers serve dual purposes: they provide electrical contact pathways and simultaneously define the isolation areas. This multi-functionality allows the same structural elements to perform both electrical and isolation functions, reducing the number of required process steps and masks.
2Reliability
If conventional manufacturing methods use dedicated masks and additional process steps to form isolation areas, then isolation effectiveness is achieved, but manufacturing cost increases
Solution Approach 1:
The patent combines the isolation area formation with the existing contact opening formation process. The same dielectric layer openings and metal layers used for electrical contacts also define the isolation areas, eliminating the need for separate dedicated isolation masks and process steps. This merging of functions reduces process complexity while maintaining isolation effectiveness.
Solution Approach 2:
The dielectric layer openings and metal layers serve dual purposes: they provide electrical contact pathways and simultaneously define the isolation areas. This multi-functionality allows the same structural elements to perform both electrical and isolation functions, reducing the number of required process steps and masks.
3Reliability
If isolation areas are formed to remove 2DEG and reduce parasitic capacitances, then device performance is improved, but process complexity and cost increase
Solution Approach 1:
The patent combines the isolation area formation with the existing contact opening formation process. The same dielectric layer openings and metal layers used for electrical contacts also define the isolation areas, eliminating the need for separate dedicated isolation masks and process steps. This merging of functions reduces process complexity while maintaining isolation effectiveness.
Solution Approach 2:
The dielectric layer openings and metal layers serve dual purposes: they provide electrical contact pathways and simultaneously define the isolation areas. This multi-functionality allows the same structural elements to perform both electrical and isolation functions, reducing the number of required process steps and masks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and simplifies the process by eliminating the need for a dedicated mask, while maintaining effective isolation and reducing parasitic capacitances in GaN semiconductor devices.
Implementation Method 1
the metal layer is then etched to form a metal mask window above the contact opening
Implementation Method 2
the barrier layer and GaN layer are etched at the portion that is exposed by the contact opening in the dielectric layer
Data Source
AI summary
A method for forming an enhancement mode GaN HFET device with an isolation area that is self-aligned to a contact opening or metal mask window. Advantageously, the method does not require a dedicated isolation mask and the associated process steps, thus reducing manufacturing costs. The method includes providing an EPI structure including a substrate, a buffer layer a GaN layer and a barrier layer. A dielectric layer is formed over the barrier layer and openings are formed in the dielectric layer for device contact openings and an isolation contact opening. A metal layer is then formed over the dielectric layer and a photoresist film is deposited above each of the device contact openings. The metal layer is then etched to form a metal mask window above the isolation contact opening and the barrier and GaN layer are etched at the portion that is exposed by the isolation contact opening in the dielectric layer.


