Symmetrical GaN Power Package Layout for Uniform Gate Drive
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Solution Overview
Problem
Conventional gallium nitride power devices face limitations in maximum output current capability due to non-uniform gate driving current distribution and packaging constraints, which affect performance in medium- and high-power applications.
Innovation Solution
A switching power device with a symmetrical pin structure featuring two gates and two Kelvin sources arranged on a device lead-frame, connected in parallel with a driving IC chip, ensuring balanced current distribution and reduced parasitic resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single gate pin is used in conventional gallium nitride devices, then the device structure is simple, but the gate driving current supply becomes non-uniform, limiting the maximum output current capability
Solution Approach 1:
The single gate pin is segmented into multiple gate pins (at least two) that are distributed across different regions of the device. This segmentation allows the gate driving current to be supplied through multiple pathways, ensuring uniform current distribution across the chip area and enabling higher output current capability without excessive complexity.
2Power
If multiple gallium nitride power devices are connected in parallel for high-power applications, then the power handling capability increases, but the heat dissipation and packaging complexity increase
Solution Approach 1:
Multiple gallium nitride power devices are merged into a single integrated device structure with multiple gates and Kelvin sources. This combining approach achieves the parallel connection effect within one device, increasing power handling capability while reducing packaging complexity and improving heat dissipation compared to connecting separate devices in parallel.
Solution Approach 2:
The patent transitions from a single-pin configuration to a multi-pin configuration by adding spatial dimensions to the gate and Kelvin source arrangement. Multiple gates and Kelvin sources are distributed in different regions of the device, creating a two-dimensional or three-dimensional arrangement that enables parallel current pathways and improved heat distribution without requiring multiple separate devices.
3Productivity
If conventional single-pin gate design is used, then the device packaging is simple, but the current distribution inside the chip is non-uniform, affecting chip performance
Solution Approach 1:
Different regions of the device are provided with different pin configurations tailored to local requirements. Gates and Kelvin sources are distributed in specific regions where they are most needed, with at least two gates and two Kelvin sources arranged to create symmetrical pin structures. This local optimization ensures uniform current distribution and improved chip performance without unnecessary complexity throughout the entire device.
Data Source
AI summary
A switching power device comprises a device lead-frame. Gates, Kelvin sources and a drain are formed on the device lead-frame, the gates and the Kelvin sources are arranged at one end of the device lead-frame, and the drain is arranged at the other end of the device lead-frame; and two gates and two Kelvin sources are provided. One end of the device lead-frame is sequentially provided with the gate, the Kelvin source, the Kelvin source and the gate, so as to form a symmetrical pin structure.