GaN Pixel Formation via Plasma Modification
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Solution Overview
Problem
Current semiconductor processing techniques face challenges in forming small, robust structures with reduced current leakage and non-uniform emission profiles, especially for GaN semiconductors, which are exacerbated by topographical features and additional thermal processing impacts on emissive devices like LEDs and RCLEDs.
Innovation Solution
A plasma treatment and annealing process is used to form p-GaN layers with modified electrical characteristics, allowing for the simultaneous creation of conductive and non-conductive regions, enabling efficient current channeling and reduced leakage, while eliminating the need for passivation and simplifying device processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If standard semiconductor processing techniques are used to form small pixels, then manufacturing capability is maintained, but manufacturing precision deteriorates due to topographical features and lithography limitations
Solution Approach 1:
The patent segments the pixel formation process into distinct stages: lithography pattern formation, plasma etching for mesa structures, and selective plasma treatment for electrical modification. This segmentation allows each step to be optimized independently, achieving high precision small pixel formation (down to 10 micrometers) while managing overall process complexity through systematic breakdown of operations
Solution Approach 2:
The patent applies preliminary plasma treatment to modify the electrical characteristics of the p-GaN layer before final pixel formation. This preliminary action creates regions with different electrical properties that facilitate subsequent processing steps and ensure proper current distribution, thereby improving manufacturing precision without requiring additional complex processing
2Reliability
If additional thermal processing is applied to form conductive regions, then electrical conductivity is improved, but device efficiency deteriorates due to impact on emissive devices
Solution Approach 1:
The patent replaces traditional thermal processing with plasma processing to form conductive regions. The plasma treatment modifies the electrical characteristics of the p-GaN layer through chemical and physical interactions rather than thermal heating, thereby achieving improved electrical conductivity without the energy loss and efficiency degradation associated with additional thermal cycles in emissive devices
Solution Approach 2:
The patent changes the processing parameter from temperature-based thermal annealing to plasma-based electrical field treatment. This parameter change enables conductive region formation through plasma-induced modifications to the semiconductor material's electrical properties, avoiding the thermal damage and energy inefficiency that would result from high-temperature processing of emissive structures
3Reliability
If passivation with oxide is applied to protect structures, then device protection is improved, but manufacturing complexity deteriorates due to additional processing steps
Solution Approach 1:
The patent extracts and eliminates the separate passivation step from the processing sequence. By using plasma treatment to simultaneously achieve both the desired electrical characteristics and surface protection, the need for additional oxide deposition and patterning steps is removed, thereby maintaining device protection while reducing overall manufacturing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process effectively reduces current leakage, allows for the formation of small pixels with nonlinear beam profiles, and enhances device performance by enabling high-resolution planar structures, improved light extraction, and extended device lifetime.
Implementation Method 1
exposing the structure including masked and bare p-GaN areas to a plasma treatment
Implementation Method 2
annealing the plasma treated layered structure
Data Source
AI summary
There is herein described a process for providing improved device performance and fabrication techniques for semiconductors. More particularly, the present invention relates to a process for forming features, such as pixels, on GaN semiconductors using a p-GaN modification and annealing process. The process also relates to a plasma and thermal anneal process which results in a p-GaN modified layer where the annealing simultaneously enables the formation of conductive p-GaN and modified p-GaN regions that behave in an n-like manner and block vertical current flow. The process also extends to Resonant-Cavity Light Emitting Diodes (RCLEDs), pixels with a variety of sizes and electrically insulating planar layer for electrical tracks and bond pads.