Three-Way GaN RF Power Amplifier for Compact Backoff Efficiency

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Solution Overview

Problem

Designing a compact high-efficiency power amplifier for wireless communication systems is challenging due to the need for distinct semiconductor components to maintain performance and prevent signal coupling, while also achieving high gain, linearity, and power-added efficiency.

Innovation Solution

A three-way combined RF power amplifier architecture using Gallium Nitride (GaN) transistors with different power capacities in carrier and peaking amplifier stages, along with input matching networks and power splitters, to amplify RF signals efficiently without load modulation, allowing for a smaller footprint and high backoff efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If distinct sets of discrete components are used for each amplification path, then signal coupling between paths is limited and performance is maintained, but the amplifier size increases and integration becomes difficult

Engineering Contradiction:
ImproveperformanceVSAvoidamplifier size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple amplification paths (carrier amplifier, first peaking amplifier, second peaking amplifier) into a single integrated semiconductor package. The amplification paths are merged spatially while maintaining electrical isolation through careful layout and grounding structures, achieving both compact size and performance reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements a nested arrangement where multiple amplification paths are closely integrated within the semiconductor package. The carrier amplifier and peaking amplifiers are positioned in a nested configuration with shared packaging structures and interconnected signal paths, reducing overall footprint while maintaining functional independence.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If amplifier paths are placed closer together to reduce size, then footprint is reduced, but signal coupling between paths increases causing performance degradation

Engineering Contradiction:
ImprovefootprintVSAvoidsignal coupling
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent introduces intermediate grounding structures and shielding elements between the amplification paths. These intermediary elements act as barriers to electromagnetic coupling while allowing the amplifier paths to be positioned closer together, thus reducing footprint without sacrificing performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies different local characteristics to different regions of the semiconductor package. Specific areas between amplification paths are designed with enhanced grounding or shielding properties, while other areas optimize signal flow. This localized quality differentiation allows close spacing while preventing harmful coupling.

Inventive Principle:
Principle #3Local quality

3Area of stationary object

If GaN devices are used to achieve compact size and higher power density, then amplifier footprint is reduced and efficiency is improved, but device complexity and manufacturing challenges increase

Engineering Contradiction:
ImprovefootprintVSAvoiddevice complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent employs GaN high-electron-mobility transistors (HEMTs) that serve multiple functions within the amplification system. The same GaN device technology is used across all amplification paths (carrier and peaking amplifiers), providing universal performance characteristics and simplifying the overall device architecture despite the advanced material requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4175169A1Three-way combined RF power amplifier architecture
Publication Date: 2023.05.03 AXIRO SEMICONDUCTOR INC
  • EP4175169A1 patent drawingFigure 1
  • EP4175169A1 patent drawingFigure 2
  • EP4175169A1 patent drawingFigure 3

AI summary

Systems and methods for amplifying a signal is described. A circuit may convert an input radio frequency (RF) signal into a first RF signal with power level matching a power capacity of a first transistor of a first size in a carrier amplifier stage, a second RF signal with power level matching a power capacity of a second transistor of the first size in a peaking amplifier stage, and a third RF signal with third power level matching a power capacity of a third transistor of a second size in another peaking amplifier stage. The circuit may amplify the first, second, and third RF signals to generate first, second, and third amplified RF signals, respectively. The circuit may combine the first, second, and third amplified RF signals, into an output RF signal that is an amplified version of the input RF signal.