GaN-Si Cascode Device for Normally-Off Operation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Power semiconductor devices, particularly those using Si, face a trade-off between breakdown voltage and on-resistance, limiting further reductions in on-resistance, and GaN-HFETs are normally-on due to piezoelectric polarization, necessitating a normally-off configuration to prevent switching noise.

Innovation Solution

A nitride semiconductor device is designed with a cascode connection of GaN-HFET and a normally-off Si-MOSFET, and additional structures like a p-GaN layer or gate insulating film to control parasitic capacitance and ensure normally-off operation, suppressing switching noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If GaN-HFET is used to achieve high breakdown voltage and low on-resistance, then the trade-off relationship between breakdown voltage and on-resistance is improved, but the device becomes normally-on due to piezoelectric polarization

Engineering Contradiction:
Improvebreakdown voltage and on-resistance trade-offVSAvoidnormally-off operation requirement
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The device is divided into two separate transistors: a GaN-HFET that provides high breakdown voltage and low on-resistance, and a Si-MOSFET that provides normally-off operation. Each transistor performs a specific function, and their series combination achieves both high performance and safe operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The GaN-HFET and Si-MOSFET are combined in a cascode configuration where the drain of the GaN-HFET is connected to the source of the Si-MOSFET, and the source of the GaN-HFET is connected to the drain of the Si-MOSFET. This merging allows the device to inherit the advantages of both transistor types.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of operation

If cascode connection with Si-MOSFET is used to achieve normally-off operation, then normally-off operation is achieved, but gate-drain capacitance becomes small causing increased switching noise

Engineering Contradiction:
Improvenormally-off operationVSAvoidswitching noise
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

A capacitor is introduced as an intermediary element connected between the gate of the GaN-HFET and the drain of the GaN-HFET (or between gate and source). This capacitor increases the gate-drain capacitance, reducing switching noise while maintaining normally-off operation through the cascode configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The device achieves a normally-off operation with reduced parasitic capacitance, effectively suppressing switching noise and maintaining constant electrostatic capacitance independent of applied voltage, thus enhancing the trade-off between breakdown voltage and on-resistance.

Implementation Method 1

the two-dimensional electron gas is formed with a high concentration due to the piezoelectric polarization of the AlGaN layer occurring due to the lattice mismatch of the heterojunction

Methodology Applied
Scientific EffectPiezoelectric polarization: Piezoelectric Effect

Implementation Method 2

a capacitor is connected between a gate electrode and a drain electrode

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8860090B2Nitride semiconductor device
Publication Date: 2014.10.14 KK TOSHIBA
  • US8860090B2 patent drawing
  • US8860090B2 patent drawing
  • US8860090B2 patent drawing

AI summary

A nitride semiconductor device includes a first semiconductor layer, a second semiconductor layer, a conductive substrate, a first electrode, a second electrode, and a control electrode. The second semiconductor layer is directly bonded to the first semiconductor layer. The conductive substrate is provided on and electrically connected to the first semiconductor layer. The first electrode and the second electrode are provided on and electrically connected to a surface of the second semiconductor layer on a side opposite to the first semiconductor layer. The control electrode is provided on the surface of the second semiconductor layer between the first electrode and the second electrode. The first electrode is electrically connected to a drain electrode of a MOSFET formed of Si. The control electrode is electrically connected to a source electrode of the MOSFET. The conductive substrate is electrically connected to a gate electrode of the MOSFET.