GaN Transistor Doping Layout for High Current and High Voltage
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Solution Overview
Problem
Gallium nitride (GaN) semiconductor devices face a challenge in simultaneously handling high current and high voltage due to the conflict between these two requirements, often resulting in devices that cannot support high drain-to-source voltage while maintaining high ON-state current.
Innovation Solution
A GaN semiconductor device design featuring a heterostructure with a two-dimensional electron gas (2DEG) channel, including a highly doped n-type N+ region for low contact resistance and a lightly doped region near the drain side of the gate contact to manage high electric fields, allowing for simultaneous high current and voltage handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the device uses a highly doped n-type N+ region to reduce contact resistance for high current handling, then contact resistance decreases and current handling improves, but the electric field control becomes more difficult under high voltage conditions
Solution Approach 1:
The patent applies local quality by creating different doping regions within the semiconductor structure. Specifically, it uses a highly doped n-type N+ region at the contact interface to reduce contact resistance for high current handling, while maintaining a lightly doped region in other areas to facilitate electric field control under high voltage conditions. This spatial variation in doping concentration allows each region to optimize its local function.
Solution Approach 2:
The patent segments the semiconductor structure into distinct functional regions with different doping characteristics. The N+ highly doped region is separated from the lightly doped region, allowing independent optimization of contact resistance and electric field control. This segmentation enables the device to handle both high current and high voltage simultaneously by assigning different regions to handle different aspects of the performance requirements.
2Reliability
If the device is designed for high voltage handling with controlled electric fields, then voltage breakdown resistance improves, but ON-state current capability is reduced
Solution Approach 1:
The patent uses local quality by implementing a lightly doped region in the bulk semiconductor material to provide controlled electric fields for high voltage breakdown resistance, while simultaneously using a highly doped N+ region at the contact interface to maintain low contact resistance for high ON-state current capability. Each region is optimized for its specific function rather than compromising overall performance.
Solution Approach 2:
The device structure is segmented into functionally distinct zones: a lightly doped region that manages electric field distribution for voltage breakdown resistance, and a highly doped N+ region that provides low contact resistance for current capability. This segmentation resolves the contradiction by allowing each segment to specialize in one aspect of performance.
3Ease of operation
If the threshold voltage is reduced to enable enhancement mode operation, then device control and switching capability improve, but ON resistance increases
Solution Approach 1:
The patent segments the doping profile into multiple regions with different concentrations. The lightly doped bulk region enables enhancement mode operation with controllable threshold voltage for improved device control and switching capability, while the highly doped N+ contact region compensates for the increased ON resistance by providing low contact resistance pathways for current flow.
Solution Approach 2:
Local quality is applied by creating a highly doped N+ region specifically at the contact interface to reduce contact resistance, while the bulk material maintains a lightly doped structure for enhancement mode control. This localized doping strategy allows the device to achieve both low ON resistance and high controllability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enables the semiconductor device to handle high current with low contact resistance and high voltage with controlled electric field management, breaking the tradeoff between threshold voltage and ON resistance, resulting in a power device with lower threshold voltage for a given ON resistance.
Implementation Method 1
forming a barrier layer over the etched portion and the exposed portion of the second semiconductor material layer to form a heterostructure having a two-dimensional electron gas (2DEG) channel
Data Source
AI summary
A gallium nitride (GaN) semiconductor device, such as a field-effect transistor (FET), is described with a design that can enable the semiconductor device to handle high current and high voltage simultaneously. For example, the device can have highly doped n-type N+ regions to ensure low contact resistance and high current. The semiconductor device can have a lightly conducting region next to the drain side of the gate contact, and the device can have a more highly conducting region further from the edge of the drain side of the gate contact. The semiconductor device can handle high current because of the low contact resistance and highly doped drain region but can handle a high electric field because of the lightly doped region near the drain edge of the gate contact. The semiconductor device can be formed in GaN by forming the original N+/N− structure, and then etching a portion of it away, and then regrowing the barrier layer.