Gate-All-Around Semiconductor Wire Structure for Density

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Solution Overview

Problem

The challenge in the semiconductor industry is to form reliable semiconductor devices at increasingly smaller sizes due to the complexity and difficulty of fabrication processes as feature sizes decrease, affecting production efficiency and costs.

Innovation Solution

The process involves forming gate all around (GAA) transistor structures using a combination of photolithography and self-aligned processes, including the use of sacrificial layers, spacers, and stressor layers to pattern semiconductor wires and dummy wires, which allows for smaller pitches and improved device density, and the formation of a gate structure that surrounds semiconductor wires made of different materials to reduce area occupation and adjust threshold voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If feature sizes continue to decrease to increase functional density, then production efficiency improves and costs lower, but fabrication process difficulty increases and reliability decreases

Engineering Contradiction:
Improvefunctional densityVSAvoidfabrication process difficulty
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The fabrication process is divided into multiple self-aligned steps including forming first and second semiconductor wires, creating spacers, and sequential patterning operations. This segmentation allows complex high-density structures to be built through manageable discrete steps, reducing overall process difficulty while achieving small feature sizes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Sacrificial layers are formed in advance before the actual semiconductor wires are created. These preliminary structures guide subsequent patterning steps and enable self-aligned fabrication, which simplifies the overall process of creating small-featured high-density devices

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If feature sizes decrease to increase device density, then area occupation reduces, but manufacturing precision requirements increase

Engineering Contradiction:
Improvearea occupationVSAvoidfabrication precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The fabrication process uses self-aligned patterning where previously formed structures (such as spacers and sacrificial layers) automatically define the position of subsequent features. This self-alignment mechanism eliminates the need for additional alignment precision steps, enabling small feature sizes with reduced area while maintaining manufacturing precision

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent forms three-dimensional structures including vertically stacked semiconductor wires and gate structures that surround wires in multiple dimensions. This dimensional transition allows high device density to be achieved through vertical stacking rather than horizontal scaling, reducing area occupation while avoiding the precision challenges of extreme lateral miniaturization

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Area of stationary object

If gate structure surrounds semiconductor wire to reduce area occupation, then device density increases, but device complexity increases

Engineering Contradiction:
Improvearea occupationVSAvoidstructure complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The gate structure serves multiple functions simultaneously: it controls the semiconductor wire, provides mechanical support, and acts as an electrical isolation element. This multi-functionality allows the surrounding gate configuration to achieve high device density without proportionally increasing complexity, as a single structure accomplishes multiple objectives

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10134640B1Semiconductor device structure with semiconductor wire
Publication Date: 2018.11.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10134640B1 patent drawing
  • US10134640B1 patent drawing
  • US10134640B1 patent drawing

AI summary

A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes a gate structure over the fin portion and extending across the fin portion. The semiconductor device structure includes a first semiconductor wire over the fin portion and passing through the gate structure. The semiconductor device structure includes a second semiconductor wire over the first semiconductor wire and passing through the gate structure. The gate structure surrounds the second semiconductor wire and separates the first semiconductor wire from the second semiconductor wire. The first semiconductor wire and the second semiconductor wire are made of different materials.