Gate Stack Capping Layers for Reliable Threshold Voltage Tuning
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Solution Overview
Problem
As semiconductor technology advances, the scaling down of integrated circuit (IC) geometry poses challenges in maintaining efficient production and reducing costs while ensuring effective transistor performance, particularly in achieving precise threshold voltages and reliable multi-gate device fabrication.
Innovation Solution
The development of a method for forming gate stacks in semiconductor devices using a common high-k layer, work function layers, capping layers, and gate fill materials, which allows for the creation of transistors with different threshold voltages by varying the materials and structures of the gate stacks, enabling efficient fabrication of multi-gate devices like FinFETs and GAA devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If geometry size is decreased to increase functional density, then production efficiency is improved and costs are lowered, but manufacturing precision and device performance become more difficult to maintain
Solution Approach 1:
The gate structure is segmented into multiple functional layers including high-k dielectric layer, work function layer, and capping layer. Each layer performs a specific function: the high-k dielectric layer provides gate control, the work function layer sets threshold voltage, and the capping layer protects underlying layers. This segmentation allows independent optimization of each layer to maintain precision at scaled dimensions.
Solution Approach 2:
Different materials are used at different locations within the gate structure to achieve local optimization. For example, titanium nitride is used in the work function layer for n-type transistors while tungsten silicide is used for p-type transistors. The capping layer is selectively formed only where needed to protect specific regions. This local quality approach maintains manufacturing precision across diverse device types at scaled geometries.
2Productivity
If geometry size is decreased to increase functional density, then production efficiency is improved and costs are lowered, but device reliability deteriorates
Solution Approach 1:
The gate structure employs composite materials combining high-k dielectric materials (such as hafnium oxide, silicon oxide, silicon nitride) with metal work function layers (titanium nitride, tungsten silicide, cobalt). This composite structure provides both the electrical control needed for scaled devices and the mechanical stability required for reliability. The high-k material enables thinner effective oxide equivalent thickness while the metal layers provide stable work function and threshold voltage control.
Solution Approach 2:
A capping layer is formed beforehand to protect the underlying high-k dielectric and work function layers from damage during subsequent fabrication processes. This capping layer acts as a protective cushion that prevents contamination and mechanical damage, ensuring device reliability throughout the manufacturing process and during device operation.
3Adaptability or versatility
If multiple transistor types with different threshold voltages are fabricated, then device versatility is improved, but device complexity increases
Solution Approach 1:
Threshold voltage is controlled by changing material parameters rather than structural complexity. Different work function materials (titanium nitride for n-type, tungsten silicide for p-type) with distinct work function values are used to set different threshold voltages. The high-k dielectric layer thickness and composition are also adjusted as parameters to achieve desired electrical characteristics. This parameter-based approach allows versatile transistor types without proportionally increasing structural complexity.
Data Source
AI summary
A method of forming a semiconductor device includes forming a first transistor and a second transistor on a substrate. The first transistor includes a first gate structure, and the second transistor includes a second gate structure. The first gate structure includes a first high-k layer, a first work function layer, an overlying work function layer, and a first capping layer sequentially formed on the substrate. The second gate structure comprising a second high-k layer, a second work function layer, and a second capping layer sequentially formed on the substrate. The first capping layer and the second capping layer comprise materials having higher resistant to oxygen or fluorine than materials of the second work function layer and the overlying work function layer.