Gate-Charge Retaining Switch for High-Side MOSFET Drivers
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Solution Overview
Problem
High-side switches and bipolar switches require external enhancement voltage and reset time, leading to inconvenient floating supplies and isolated control-signal drivers, especially for high-side switches, which complicates the switching process.
Innovation Solution
A bistable switch design that injects and removes charge from the gate of a switch-device using transformers, allowing the switch to maintain its ON state without external voltage, enabling fast toggling and eliminating the need for external voltage supplies by storing charge in the gate capacitance, and providing both power and isolation for MOSFET or IGBT devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external enhancement voltage is applied during the entire switch ON time, then the switch can maintain its ON state, but it requires floating supplies and isolated control-signal drivers which complicates the circuit
Solution Approach 1:
The switch device maintains its own gate charge through the body diode and parasitic capacitance, eliminating the need for external enhancement voltage during the entire ON time. The switch essentially services itself by retaining gate charge without requiring complex floating supplies or isolated drivers.
Solution Approach 2:
The patent extracts and eliminates the external enhancement voltage supply and isolated control-signal driver components from the circuit. By removing these external dependencies, the circuit complexity is reduced while maintaining reliable switch operation through internal charge retention mechanisms.
2Ease of operation
If charge is removed from the gate to turn the switch OFF, then the switch can be turned OFF, but it requires waiting for the charge-injection transformer to recover which slows down toggling
Solution Approach 1:
The patent segments the charge removal function into a separate path using the body diode and parasitic capacitance, independent of the charge injection transformer. This allows charge removal to occur simultaneously with transformer recovery, eliminating the waiting period and enabling faster toggling of large switch devices.
3Adaptability or versatility
If the switch is designed to operate without voltage higher than the load voltage, then it simplifies voltage requirements, but it limits the available enhancement voltage for driving MOSFET or IGBT devices
Solution Approach 1:
The patent changes the operational parameters by utilizing the body diode and parasitic capacitance to generate the necessary enhancement voltage internally, eliminating the need for external voltage higher than the load voltage. This parameter change enables voltage-compatible operation while maintaining sufficient enhancement voltage for driving MOSFET or IGBT devices through the internal charge retention mechanism.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables fast and efficient switching with reduced timing constraints, eliminating the need for external voltage supplies and isolated drivers, allowing for stable ON and OFF states without continuous energy application, and supports high-frequency operations with large switch devices.
Implementation Method 1
When the control signal CONT SIG goes positive, it turns on switch S1, connecting the primary winding of transformer Tsw across voltage source Vsw. Current rises in the primary of Tsw, inducing a voltage into the secondary winding of Tsw
Implementation Method 2
When the CONT SIG falls, S1 turns OFF, and the magnetic field in Tsw causes its secondary to 'fly back,' driving negative its dotted pole. When that pole flies one diode-drop negative, BJT Qoff conducts, discharging the gate of Qsw, and turning OFF the switch
Data Source
AI summary
This invention provides a means and method for preventing unwanted semiconductor turn-on and turn-off, caused by a high rate of voltage change, without significantly affecting the desired ON and OFF transitions of the semiconductor. According to this invention, time is provided during either or both bistable ON and OFF semiconductor states, during which the semiconductor gate is allowed to float, neither being driven ON or OFF, and circuitry for lowering gate-node impedance at non-transitional times to prevent state disruptions by dV/dT is provided.


