Gate Dielectric Dipole Diffusion for Threshold Voltage Tuning
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Solution Overview
Problem
The challenge of achieving high integration density and reliability in semiconductor devices while reducing process complexity and costs remains unsolved in existing technologies.
Innovation Solution
A method involving the formation of dipole layers on gate dielectric layers, followed by a heat treatment process to diffuse dipole materials into these layers, and the subsequent formation of gate structures, which includes using different dipole materials to shift threshold voltages in opposite directions, thereby enhancing transistor performance and integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If integration density is increased by scaling down transistors, then device performance and functionality are improved, but process complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies local quality by forming different dipole layers (first dipole layer with first dipole material, second dipole layer with second dipole material) on different regions of the gate dielectric layer. This allows different threshold voltage adjustments in different transistor regions without requiring different manufacturing processes for each transistor, thus maintaining high integration density while managing process complexity through localized material differentiation.
Solution Approach 2:
The patent changes material parameters by introducing dipole materials with different dipole moments into the gate dielectric layer. By controlling the type, amount, and distribution of dipole materials, the threshold voltage of transistors can be precisely adjusted during manufacturing, enabling high integration density with standardized processes.
2Reliability
If multiple dipole layers with different dipole materials are formed to adjust threshold voltages, then transistor performance and electrical properties are improved, but manufacturing steps and process costs increase
Solution Approach 1:
The patent applies preliminary action by forming both the first and second dipole layers on the gate dielectric layer before any transistor fabrication steps. This preliminary formation of dipole structures with different materials allows subsequent transistor manufacturing to proceed with standardized processes, improving electrical properties without adding complexity to the main fabrication flow.
Solution Approach 2:
The gate dielectric layer structure serves multiple functions: it acts as the insulating layer for transistor operation, provides a substrate for dipole material formation, and enables threshold voltage adjustment through the incorporated dipole layers. This multi-functionality improves electrical properties while minimizing additional manufacturing steps.
3Reliability
If dipole materials are diffused into gate dielectric layers through heat treatment, then threshold voltage control is improved, but process temperature and energy consumption increase
Solution Approach 1:
The patent utilizes phase transitions during heat treatment to facilitate the diffusion of dipole materials into the gate dielectric layer. By controlling temperature to induce appropriate phase transitions, the dipole materials are effectively incorporated into the dielectric structure, improving threshold voltage control while managing energy consumption through controlled thermal processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves integration density and reliability of semiconductor devices by allowing for varied threshold voltages and reduced process difficulty and costs, resulting in improved electrical properties and reliability.
Implementation Method 1
performing a heat treatment process of diffusing the first dipole material in the first dipole layer and the second dipole material in the second dipole layer into corresponding preliminary gate dielectric layers among the preliminary gate dielectric layers
Data Source
AI summary
A method of manufacturing a semiconductor device comprising: forming active structures; forming preliminary gate dielectric layers on the active structures; forming a first dipole layer including a first dipole material and a second dipole layer including a second dipole material on the preliminary gate dielectric layers; removing the first and second dipole layers in regions other than a first region of the active structures; removing a portion of the second dipole layer in regions other than a second region of the active structures, wherein each of the first and second regions includes at least two active structures, and the first region and the second region overlap to form an overlapping region; and performing a heat treatment process of diffusing the first and second dipole materials into the preliminary gate dielectric layers, wherein the overlapping region includes at least one of the active structures.