Replacement Gate Dielectric Fluorination for Threshold Voltage Tuning
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Solution Overview
Problem
As the minimum feature sizes in semiconductor devices are reduced, challenges arise in effectively integrating more electronic components into a given chip area, including issues with gate dielectric reliability and threshold voltage tuning.
Innovation Solution
A method of selectively incorporating fluorine into the gate dielectric of a replacement gate stack, involving the formation of gate dielectrics around nanostructures, deposition of a fluorine-containing layer, and an annealing process to diffuse fluorine into the gate dielectric, thereby tuning the work functions and threshold voltages of transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature sizes are reduced to increase integration density, then more electronic components can be integrated into a given chip area, but gate dielectric reliability deteriorates due to charge buildup and leakage paths
Solution Approach 1:
The patent applies local quality by selectively incorporating fluorine into specific regions of the gate dielectric structure. The fluorine-containing layer is deposited only in certain areas and then selectively removed in others, creating non-uniform fluorine distribution that locally modifies dielectric properties to reduce charge buildup and leakage paths in critical regions while maintaining overall device functionality
Solution Approach 2:
The patent changes the chemical composition parameter of the gate dielectric by incorporating fluorine atoms into the dielectric layer. This parameter change modifies the electrical properties of the gate dielectric, reducing charge buildup and leakage paths, thereby improving gate dielectric reliability without requiring changes to the physical dimensions or structure
2Reliability
If fluorine is incorporated into the gate dielectric to improve reliability and tune threshold voltage, then gate dielectric reliability improves, but device complexity increases due to additional process steps
Solution Approach 1:
The patent merges multiple functions into a single fluorine incorporation process. The same process that improves gate dielectric reliability by reducing charge buildup also enables threshold voltage tuning by controlling the amount and distribution of fluorine. This combining of reliability improvement and parameter tuning into one process reduces overall process complexity compared to implementing them as separate steps
Solution Approach 2:
The patent performs preliminary action by depositing the fluorine-containing layer before final gate dielectric formation or early in the gate stack fabrication process. This preliminary incorporation of fluorine allows subsequent processing steps to work with pre-modified dielectric material, simplifying later threshold voltage tuning and reliability enhancement steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the reliability of gate dielectrics by reducing charge buildup and leakage paths, while allowing for precise tuning of threshold voltages without affecting gate structure spacings.
Implementation Method 1
an annealing process to diffuse fluorine into the gate dielectric
Implementation Method 2
an annealing process to diffuse fluorine into the gate dielectric
Data Source
AI summary
A method includes removing a first dummy gate stack and a second dummy gate stack to form a first trench and a second trench. The first dummy gate stack and the second dummy gate stack are in a first device region and a second device region, respectively. The method further includes depositing a first gate dielectric layer and a second gate dielectric layer extending into the first trench and the second trench, respectively, forming a fluorine-containing layer comprising a first portion over the first gate dielectric layer, and a second portion over the second gate dielectric layer, removing the second portion, performing an annealing process to diffuse fluorine in the first portion into the first gate dielectric layer, and at a time after the annealing process, forming a first work-function layer and a second work-function layer over the first gate dielectric layer and the second gate dielectric layer, respectively.