Gate Dielectric Layer Formation via Sacrificial Liner Oxidation
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Solution Overview
Problem
The silicon loss phenomenon during thermal oxidation of active portions in semiconductor devices leads to reduced channel widths of transistors, increasing channel resistance and degrading transistor characteristics, especially in high-process technology devices with feature sizes of 20 nanometers or less.
Innovation Solution
A method involving the formation of a sacrificial liner on the active portions of a semiconductor substrate, followed by radical oxidation to create a gate dielectric layer, which suppresses silicon atom loss and allows for controlled thickness of the gate dielectric layer, thereby maintaining channel widths and improving transistor characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If thermal oxidation is performed to form a gate dielectric layer on active portions, then a gate dielectric layer is formed, but silicon atoms are lost causing reduced channel widths and increased channel resistance
Solution Approach 1:
A sacrificial liner layer is introduced as an intermediary material between the active portion and the oxidation environment. This liner layer absorbs the oxidation process instead of allowing direct oxidation of the active portion, thereby preventing silicon atom loss while enabling precise gate dielectric layer formation. The liner is subsequently removed after serving its protective function.
Solution Approach 2:
The sacrificial liner layer is formed on the active portion before the oxidation process begins. This preliminary action prepares the surface to prevent silicon loss during the subsequent gate dielectric layer formation, ensuring that channel widths are maintained and not reduced by oxidation-induced silicon consumption.
2Manufacturing precision
If channel widths are reduced due to silicon loss, then gate dielectric layer formation is achieved, but channel resistance increases and transistor characteristics degrade
Solution Approach 1:
The sacrificial liner acts as a mediator that prevents direct interaction between the oxidation process and the active portion surface. By absorbing the oxidation, it preserves the channel width dimensions and prevents the formation of silicon oxide on the active portion, thereby maintaining low channel resistance and good transistor characteristics while still enabling gate dielectric layer formation.
3Manufacturing precision
If active portions are oxidized to form gate dielectric layer, then dielectric layer is created, but sensing margin of cell current is reduced
Solution Approach 1:
The sacrificial liner layer serves as a protective intermediary that prevents oxidation of the active portion during gate dielectric layer formation. By preventing silicon loss and channel width reduction, it maintains the transistor's current driving capability and sensing margin, ensuring reliable memory cell operation while still achieving the necessary gate dielectric layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents silicon loss and allows for accurate control of the gate dielectric layer thickness, enhancing the performance of transistors by reducing channel resistance and improving the characteristics of memory cell transistors.
Implementation Method 1
oxidizing the sacrificial liner to form a gate dielectric layer
Implementation Method 2
treating the sacrificial liner using the radical source excited by an energy to form a gate dielectric layer
Data Source
AI summary
A semiconductor device is fabricated by, inter alia, forming a sacrificial liner on an active portion of a semiconductor substrate, oxidizing the sacrificial liner to transform the sacrificial liner into a gate dielectric layer, and forming a gate on the gate dielectric layer.