Gate-Control Diode Bias Switching for PWM Recovery Loss Reduction
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Solution Overview
Problem
Existing semiconductor-circuit technologies struggle to minimize conduction loss, reverse recovery loss, and forward recovery loss in power semiconductor devices like IGBTs and diodes during pulse width modulation (PWM) operations in inverters, particularly in low-power and high-power applications.
Innovation Solution
A method of controlling the semiconductor circuit by optimizing the gate bias of gate control diodes to vary the carrier extraction duration (t d_rr ) based on the non-conduction duration (t off ) of IGBTs, applying negative, zero, or positive biases to reduce forward and reverse recovery losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If fixed gate bias control is applied, then device complexity is low, but power consumption reduction is limited under various pulse conditions
Solution Approach 1:
The patent implements a feedback control mechanism where the gate bias control is based on the detected conduction duration of the IGBT. The control system continuously monitors the IGBT state and adjusts the gate bias accordingly, creating a closed-loop control system that optimizes power consumption while maintaining manageable complexity through straightforward feedback logic.
Solution Approach 2:
The patent applies preliminary gate bias adjustment before the diode switching event occurs. By pre-setting the appropriate gate bias level based on the anticipated conduction duration, the patent prepares the diode for optimal switching performance, reducing recovery losses before they occur rather than reacting after the fact.
2Loss of energy
If carrier extraction duration is not optimized, then control simplicity is maintained, but conduction loss and recovery loss remain high
Solution Approach 1:
The patent makes the carrier extraction duration a dynamic parameter that adapts to the IGBT conduction duration. By dynamically adjusting the extraction time based on operational conditions, the patent optimizes conduction loss reduction while keeping the control mechanism relatively simple through direct time-based adjustment rather than complex algorithms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces electric power consumption and size by minimizing forward and reverse recovery losses in diodes during PWM operations, enhancing efficiency and reducing energy losses in inverters.
Implementation Method 1
a gate electrode capable of controlling the concentration of carriers injected into a drift area is disposed on the surface of an anode area
Implementation Method 2
reduction of electric power consumption is required for power semiconductor devices such as an insulated gate bipolar transistor (IGBT) and a diode... reducing a forward recovery loss as well as a conduction loss
Implementation Method 3
it is difficult to reduce the forward recovery loss in pulse width modulation (PWM) operation of an inverter
Data Source
Figure 1A~1B
Figure 2
Figure 3A~3B
AI summary
Carrier concentration of a drift area 87 is controlled in a semiconductor substrate in accordance with voltage applied to a gate electrode 81 of a gate control diode 203. In a reverse recovery state, a voltage signal of zero bias or positive bias with which an electron layer is generated at the interface of the gate electrode 81 is applied between the gate electrode 81 and an anode electrode 86. In a forward recovery state, a voltage signal of negative bias with which a hole layer is generated at the interface of the gate electrode 81 is applies between the gate electrode 81 and the anode electrode 86. After the forward recovery state, the negative bias is switched to a voltage signal for applying the zero bias or the positive bias. The gate control diode 203 controls a duration of application of the zero bias or the positive bias to vary in accordance with a non-conduction duration of the IGBTs coupled in series.