Ac-Dc Conversion TRIZ Cases

A hybrid power supply switches between pass-through and switched-capacitor modes to cut power loss while keeping output voltage stable.

Frequency and time-frequency analysis of converter current or voltage reveals degradation early without extra sensors, reducing downtime.

Dynamic gate-voltage control uses junction temperature feedback to limit thermal stress and prevent premature converter switch failures.

Balances positive- and negative-sequence reactive currents during asymmetrical LVRT to maximize active power without exceeding phase current limits.

Adaptive switching frequency control raises converter stability under changing AC and DC conditions while limiting unnecessary switching loss.

Lowering switch frequency during AC short-circuit faults cuts semiconductor losses and enables higher current without overdimensioning.

Redundant voltage vector weighting balances neutral point current in a 3-level inverter, limiting capacitor stress and voltage drift.

Repeating energizing and de-energizing patterns enable coarse and fine output voltage adjustment with faster response to input and load changes.

A 3D DC terminal layout through the PCB area cuts inductance, improving semiconductor switching and reducing power losses.

Multi-stage gate-current control delays transistor turn-on to limit reverse recovery through current, reduce ringing, and stabilize output voltage.

A pre-charged auxiliary capacitor balances flying capacitor voltage in a three-level buck circuit, improving efficiency and preventing over-voltage damage.

PWM spread rebalancing keeps inverter control linear under large kVA loads, raising AC output voltage while preserving power quality.

Pulsing the inverter through an existing PWM filter RLC circuit cuts DC energy storage discharge time to safe levels without added circuitry.

A hybrid Si IGBT and SiC MOSFET topology uses SiC Schottky diodes to cut switching losses, harmonic injection, and converter size.

Segmented n-type pillar regions use inclined ion implantation to preserve charge balance despite trench variation, lowering resistance and stabilizing breakdown voltage.

Sampling-based AC input monitoring detects abnormal reverse voltage and quickly turns off power switches to prevent reverse current damage.

A two-stage AC voltage ramp keeps parallel converters synchronized during black start, cutting circulating current without extra hardware.

Bias switching in a gate-control diode adjusts carrier extraction to cut forward and reverse recovery losses during PWM inverter operation.

Time-windowed sharing of switching and communication signals cuts gate-driver wiring while limiting interference and preserving signal decoding.

An integrated grid and DC-link auxiliary supply keeps the controller powered during grid faults while reducing converter size and complexity.

A single control circuit and multi-winding isolation transformer simplify mixed AC/DC motor drives while improving efficiency and reliability.

When switching cells fail, this MMC shifts to limited output mode to keep railway interties running with lower power, fewer parts, and less damage risk.

Using off-grid operation to absorb low PV energy before grid connection, this case cuts switching cycles, power use, and component wear.

A relay-based current limiting circuit works with AC and filter reactors to curb inrush current and overvoltage that can damage switching elements.

Temperature feedback adjusts NPC inverter switch on-time during LVRT to protect clamping diodes while sustaining reactive power support.

Input voltage sensing lets a totem-pole circuit detect AC or DC supply and select PFC or DC modes for stable hybrid power conversion.

Threshold-based off-grid control absorbs low PV output before grid connection, cutting repeated switching, power use, and component wear.

Separate positive and negative half-bus voltage duty cycles keep three-level inverter output accurate and reduce harmonics under bus imbalance.

A unified DC bus control scheme coordinates AC/DC, DC/DC, boost, and buck-boost stages to switch power sources without interruption.

A varying threshold tied to input voltage lets the comparator assert the output signal accurately when boosted voltage reaches the target.

By timing IGBT switch-on at the minimum voltage, this QR inverter control cuts switching losses and improves induction cooking efficiency.

Series-connected energy storage cells buffer peak x-ray load, stabilizing inverter input voltage and reducing mains power demand.

Adjusting switch delay in parallel power converter units suppresses circulating current and short-circuit risk without bulky AC filter inductors.

Pre-charging the flying capacitor to an output-voltage fraction cuts cold-start switch stress and improves converter reliability.

A combined starter-exciter replaces separate motor and exciter units to cut rotating stabiliser footprint, maintenance, noise, and cost.

Different current loading of IGBT and SiC MOSFET switches cuts partial-load switching and conduction losses without full SiC inverter cost.

Monolithic bidirectional GaN HEMT midpoint switches cut part-load conduction losses, cost, and thermal stress in T-type 3-level converters.

Forbidden-state-free switching sequences and dwell-time tuning cut neutral-point voltage swing, harmonics, and semiconductor stress.

Characteristic-frequency feedback tunes switch timing in parallel converter units to suppress circulating current without bulky AC filter inductors.

Parallel attenuator and rectifier paths extend RF power detection range, improve linearity, and reduce latency for faster gain adjustment.

When a full-bus load fails, coordinated shutdown of the half-bus load prevents capacitor over-voltage and lowers fault rates.

A middle filter network replaces bulky DC-link storage, enabling compact AC-AC conversion while absorbing harmonics and protecting semiconductors.

Adjustable DC-link capacitor ratios and space vector modulation expand three-phase output range while cutting harmonics and conduction losses.

Directly linking the transformer winding lead to the power module removes board current patterns, cutting impedance, leakage inductance, and board area.

Using a breaker resistor, bypass switch, and short-circuit path, this case enables rapid MMC capacitor discharge without added cell resistors.

Controlled short-circuit states and reduced gate voltage heat semiconductor switches at cold start, cutting failures and EMI.

Variable switching-period control enables zero-voltage turn-on in grid-connected inverters, cutting transistor losses while supporting higher frequency.

By adjusting switching period and duty ratio from grid and DC voltages, the inverter achieves valley-voltage turn-on with lower switching loss.

By varying PWM switching frequency within each waveform period, this case cuts harmonic excitation, noise, and losses while preserving analog signal quality.