Trench Gate MOSFET Pillar Layout for Charge-Balanced Breakdown Voltage

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In trench gate type MOSFETs, variations in gate trench width or depth during dopant implantation lead to charge imbalance between p-type and n-type pillar regions, affecting withstand voltage characteristics and resistance reduction.

Innovation Solution

A semiconductor device design with a high concentration and low concentration n-type pillar regions formed laterally, using inclined ion implantation to suppress dopant implantation into the p-type pillar region, maintaining charge balance and enhancing breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If inclined ion implantation is used to form the n-type pillar region, then resistance reduction and high breakdown voltage can be achieved, but when there is variation in gate trench width or depth, a large amount of donor is implanted into the p-type pillar region, causing charge balance to be hardly performed and variation to occur in withstand voltage characteristics

Engineering Contradiction:
Improvewithstand voltage characteristicsVSAvoidgate trench width and depth variation
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The n-type pillar region is segmented into a high concentration region and a low concentration region. The low concentration region is positioned closer to the gate trench, while the high concentration region is positioned farther away. This segmentation allows the low concentration region to minimize dopant diffusion into the p-type pillar region, while the high concentration region provides sufficient donor concentration for resistance reduction, thereby resolving the contradiction between achieving low resistance and maintaining charge balance despite gate trench variations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the n-type pillar region are assigned different impurity concentrations to perform different functions. The low concentration region near the gate trench minimizes harmful dopant diffusion into the p-type pillar region, while the high concentration region farther away provides the necessary donor concentration for low resistance. This local differentiation of quality allows the structure to simultaneously achieve resistance reduction and maintain charge balance.

Inventive Principle:
Principle #3Local quality

2Ease of operation

If the n-type pillar region is formed by inclined ion implantation, then the route of ON current between gate and trench is prevented from narrowing, but charge balance between p-type and n-type pillar regions becomes difficult to achieve

Engineering Contradiction:
Improvecurrent flow characteristicsVSAvoidcharge balance
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The n-type pillar region is divided into high and low concentration regions to separately fulfill the functions of maintaining current flow and achieving charge balance. The low concentration region prevents excessive dopant diffusion that would disrupt charge balance, while the high concentration region ensures sufficient carrier concentration for low resistance current flow, thus resolving the contradiction between ease of operation and reliability.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The configuration achieves stable charge balance, reducing resistance and increasing breakdown voltage by ensuring deep penetration of pillar regions, thus improving the semiconductor device's performance.

Implementation Method 1

The second pillar region is made up of a high concentration region and a low concentration region provided to at least one lateral part of the second pillar region and having a lower impurity peak concentration than the high concentration region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS20260040640A1Semiconductor device, power conversion apparatus, and method of manufacturing semiconductor device
Publication Date: 2026.02.05 MITSUBISHI ELECTRIC CORP
  • US20260040640A1 patent drawing
  • US20260040640A1 patent drawing
  • US20260040640A1 patent drawing

AI summary

A semiconductor device includes: first pillar regions of a second conductivity type each formed on a lower side of the plurality of gate trenches into which a gate electrode is embedded; and a second pillar region of a first conductivity type formed between the first pillar regions adjacent to each other and having a higher impurity peak concentration than the drift layer. The second pillar region is made of a high concentration region and a low concentration region provided to at one lateral part of the second pillar region and having a lower impurity peak concentration than the high concentration region.