Parallel Power Converter Delay Compensation for Circulating Current
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Solution Overview
Problem
Circulating currents and short circuits in parallel power converter units cause poor system performance, particularly in weight-critical applications like aerospace, due to mismatched switching actions and the addition of AC filters increases weight and bulkiness.
Innovation Solution
A method to reduce circulating currents by adjusting switching delays in parallel power converter units based on characteristic frequency analysis, using a single controller to synchronize switching actions and implement delay compensation, and a shutdown mechanism for excessive short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If AC filter inductors are added to reduce circulating current, then circulating current is reduced, but weight and bulkiness increase
Solution Approach 1:
The patent changes the timing parameter of switching actions by introducing adjustable delays to the switching signals. By modifying the time parameter (switching delay) of the power semiconductor switches in parallel converter units, the circulating current is reduced without adding physical filter components, thus avoiding weight increase.
Solution Approach 2:
The patent replaces the mechanical/physical solution (adding AC filter inductors) with an electronic control solution (adjusting switching delays). Instead of using physical components to filter circulating current, the invention uses electronic timing adjustment of switching signals to eliminate the root cause of circulating current generation.
2Object-generated harmful factors
If AC filter inductors are added to reduce circulating current, then circulating current is reduced, but device complexity increases
Solution Approach 1:
The patent modifies operational parameters (switching delays) rather than adding physical components. By adjusting the timing parameter of existing switching circuits, the solution reduces circulating current without increasing device complexity or requiring additional filter inductors.
Solution Approach 2:
The patent extracts and addresses the root cause of circulating current (switching timing mismatch) directly, rather than adding external filtering components. By taking out the timing synchronization issue and resolving it through delay adjustment, the solution avoids adding complex filter circuits.
3Object-generated harmful factors
If switching delays are adjusted to synchronize switching actions, then circulating current is reduced, but control complexity increases
Solution Approach 1:
The patent implements a feedback mechanism where the controller monitors and adjusts switching delays based on the operating conditions of parallel converter units. By continuously adapting the delay parameters according to actual switching behavior and load conditions, the system maintains synchronization and minimizes circulating current while managing control complexity through intelligent feedback control.
Data Source
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AI summary
A method for reducing a circulating current in a power converter (100) that has a first power converter unit (10) and a second power converter unit (20) arranged in parallel. Each power converter unit (10, 20) has at least one commutation cell (61-63, 64-66) with a top switching unit (S11, S13, S15, S21, S23, S25) and a bottom switching unit (S12, S14, S16, S22, S24, S26) connected as a half bridge circuit and configured to receive a DC input voltage and provide a single phase current (IA1, IA2). Each phase current (IA, IB, IC) provided by the power converter (100) is the sum of a respective first phase current (IA1) of a commutation cell (61) of the first power converter unit (10) and a respective second phase current (IA2) of a commutation cell (64) of the second power converter unit (20). The method involves: for each phase current (IA, IB, IC) provided by the power converter (100): determining (801) a characteristic frequency in the phase current (IA1, IA2, IA), the characteristic frequency being a switching frequency of the switching units (S11, S12, S21, S22) of the commutation cells (61, 64) or related to that frequency; determining (802) the magnitude of the characteristic frequency; comparing (803) the magnitude of the characteristic frequency with a predetermined magnitude; and, if the magnitude is larger than the predetermined magnitude, adding or reducing (804) in steps a switching delay to the top or bottom switching unit (S11, S12) of a commutation cell (61) of the first power converter unit (10) until the magnitude of the characteristic frequency is equal to or below the predetermined magnitude, the delay being added or reduced to the top or bottom switching unit (S11, S12) of that commutation cell (61) of the first power converter unit (10) that is involved with providing the first phase current (IA1) for the considered phase current (IA).