Gate Electrode Structure for Smaller Pad Area in Semiconductor Chips
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Solution Overview
Problem
Existing semiconductor devices face challenges in maximizing the active area of the chip while ensuring effective electrical connectivity and minimizing the region occupied by electrode pads, particularly the gate electrode pad, which often requires a larger area due to its connection with the gate electrode.
Innovation Solution
The semiconductor device incorporates a gate electrode with an external exposed portion flush with the sealing resin and a gate electrode pad connection portion that is sandwiched between the gate electrode pad and the resin, allowing for a smaller gate electrode pad region by using a protrusion structure that enhances bonding strength and prevents short circuits, thereby expanding the active area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate electrode pad is made larger to ensure effective electrical connectivity and bonding strength, then the bonding reliability is improved, but the active area of the chip is reduced
Solution Approach 1:
The gate electrode is designed with a protrusion that extends in the thickness direction (Z-axis) of the chip. This vertical dimensionality change allows the electrode pad on the chip surface to be smaller while the protruding gate electrode provides sufficient bonding area and electrical connectivity in the vertical direction, thus resolving the contradiction between small pad area and bonding reliability
Solution Approach 2:
The gate electrode's protrusion structure is nested within the packaging structure, with the protrusion extending into the packaging resin. This nesting approach allows the electrode to maintain strong electrical connection with the chip pad while being protected and supported by the packaging material, enabling smaller pad areas without compromising bonding reliability
2Area of moving object
If the gate electrode pad region is minimized to expand active area, then the chip's active area is improved, but the bonding strength and electrical connectivity may be compromised
Solution Approach 1:
By transitioning from a two-dimensional pad connection to a three-dimensional protrusion structure, the bonding strength is enhanced through increased contact area in the vertical direction. The protrusion's extended height provides sufficient mechanical interlocking and electrical conductivity without requiring a larger footprint on the chip surface
Solution Approach 2:
The gate electrode's geometric parameters are optimized by creating a protrusion with specific height and width dimensions. This parameter change allows the electrode to achieve adequate bonding strength and electrical connectivity with a minimized pad footprint, directly supporting the goal of expanding active area while maintaining bonding strength
3Productivity
If the gate electrode pad is reduced in size to maximize active area, then the chip layout efficiency is improved, but the risk of bonding interface delamination increases
Solution Approach 1:
The protrusion structure adds vertical bonding capacity that compensates for the reduced horizontal pad area. This dimensional transition ensures adequate bonding interface stability without requiring larger pad regions, thereby maintaining layout efficiency while preventing delamination
Solution Approach 2:
The gate electrode protrusion is nested within the packaging resin structure, creating a mechanically interlocked assembly. This nesting provides structural support and stress distribution that prevents bonding interface delamination even with minimized pad areas, ensuring both layout efficiency and bonding reliability
Data Source
AI summary
According to one embodiment, there is provided a semiconductor device including a chip, and a gate electrode connected to a gate electrode pad provided on the chip. The gate electrode includes an external exposed portion having an external exposed surface that is flush with an external exposed surface of a sealing resin, and a gate electrode pad connection portion continuous with the external exposed portion and connected to the gate electrode pad, the gate electrode pad connection portion including a portion sandwiched between the gate electrode pad and a part of the sealing resin.