Memory Gate Electrode Sequencing to Prevent NFET WF Metal Oxidation
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Solution Overview
Problem
Conventional methods of fabricating FinFET or GAA devices lead to unintentional and undesirable oxidation of the N-type work function metal in NFETs, resulting in performance degradations such as slow device speed or excessive threshold voltage variation, particularly in IC applications like SRAM devices.
Innovation Solution
A unique fabrication process flow where P-type WF metal of the PFETs is formed before the N-type WF metal of the NFETs, avoiding exposure of the N-type WF metal to oxidation during photoresist removal, thereby preventing performance degradations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fabrication methods are used to form N-type WF metal in NFETs, then the device structure is completed, but the N-type WF metal undergoes unintentional oxidation leading to performance degradation
Solution Approach 1:
The patent applies preliminary action by forming the P-type WF metal layer before forming the N-type WF metal layer. This sequence ensures that when photoresist is removed and oxidation occurs, the N-type WF metal is not yet exposed, preventing oxidation damage. The harmful oxidation effect is avoided by performing the N-type WF metal formation as a preliminary action after protecting against oxidation conditions.
Solution Approach 2:
The patent inverts the conventional fabrication sequence by forming P-type WF metal before N-type WF metal, rather than the traditional approach of forming N-type first. This inversion changes the timing of when the N-type WF metal is exposed to oxidation-prone conditions, effectively preventing the harmful oxidation that would otherwise occur in conventional processes.
2Productivity
If photoresist removal is performed to complete patterning, then the fabrication process progresses, but oxidation of N-type WF metal occurs during this step
Solution Approach 1:
The patent uses preliminary action by completing the N-type WF metal layer formation before the photoresist removal step. This ensures that when photoresist is removed and oxidation occurs, the N-type WF metal is already formed and protected, maintaining manufacturing precision while allowing productivity to progress through the fabrication steps.
3Speed
If device speed is improved by optimizing WF metal properties, then performance increases, but oxidation during fabrication degrades these improvements
Solution Approach 1:
The patent creates an inert environment by controlling the fabrication sequence to prevent exposure of N-type WF metal to oxidizing conditions. By forming N-type WF metal before photoresist removal and utilizing the protective effect of subsequent processing steps, the patent maintains the integrity and uniformity of the WF metal properties, ensuring both device speed and threshold voltage uniformity are achieved without oxidation degradation.
Data Source
AI summary
A sacrificial layer is formed over a first channel structure of an N-type transistor (NFET) and over a second channel structure of a P-type transistor (PFET). A PFET patterning process is performed at least in part by etching away the sacrificial layer in the PFET while protecting the NFET from being etched. After the PFET patterning process has been performed, a P-type work function (WF) metal layer is deposited in both the NFET and the PFET. An NFET patterning process is performed at least in part by etching away the P-type WF metal layer and the sacrificial layer in the NFET while protecting the PFET from being etched. After the NFET patterning process has been performed, an N-type WF metal layer is deposited in both the NFET and the PFET.