Gate Electrode Work Function Control via Metal Nitride ALD
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Solution Overview
Problem
Conventional doped polysilicon gate electrodes in semiconductor devices face issues such as gate depletion and non-ideal effective work function, which become significant in advanced node applications, making them impractical for CMOS device fabrication.
Innovation Solution
The use of atomic layer deposition (ALD) to form transition metal nitride, aluminide, and carbide films, such as niobium nitride and titanium aluminide, as gate electrodes, which provide a more ideal effective work function for NMOS and PMOS devices by adjusting the work function metal thickness and composition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If doped polysilicon is used as gate electrode material, then the gate electrode can be formed with conventional processes, but gate depletion occurs creating extra gate insulator thickness and non-ideal effective work function
Solution Approach 1:
The patent changes the material parameter from doped polysilicon to metal nitride, metal aluminide, or metal carbide to eliminate gate depletion effects. This material substitution fundamentally alters the electrical properties, providing ideal effective work function and preventing carrier depletion in the gate electrode, thereby achieving precise gate insulator thickness control without the parasitic depletion region.
Solution Approach 2:
The patent employs composite gate electrode structures combining metal layers with nitride, aluminide, or carbide compounds. These composite materials integrate the benefits of metal conductivity with the protective and functional properties of the compound layers, achieving both ideal effective work function and gate depletion elimination while maintaining manufacturability.
2Ease of manufacture
If doped polysilicon is used as gate electrode material, then the gate electrode can be formed, but the effective work function is non-ideal for both NMOS and PMOS devices
Solution Approach 1:
The patent changes the material composition from doped polysilicon to metal nitride, metal aluminide, or metal carbide to achieve ideal effective work function values. This parameter change in material properties directly addresses the non-ideal work function issue, enabling reliable NMOS and PMOS device operation with appropriate energy barriers for electron extraction.
3Reliability
If threshold voltage adjustment implantation is used to correct non-ideal effective work function, then the work function can be adjusted, but the process becomes increasingly complex and impractical as device geometries reduce
Solution Approach 1:
The patent applies preliminary action by selecting gate electrode materials with inherently ideal effective work function properties from the outset. Instead of requiring subsequent threshold voltage adjustment implantation to correct non-ideal work function, the metal nitride, metal aluminide, or metal carbide materials provide the correct electrical characteristics directly, eliminating the need for complex adjustment processes even as device geometries scale down.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of gate electrodes with improved effective work function values, reducing gate depletion and enhancing the performance of CMOS devices by providing a more suitable energy barrier for electron extraction, thus addressing the limitations of doped polysilicon gate electrodes.
Implementation Method 1
depositing by atomic layer deposition a niobium nitride layer over the NMOS gate dielectric and over the PMOS gate dielectric
Implementation Method 2
etching the niobium nitride layer over the NMOS gate dielectric
Data Source
AI summary
Methods for forming a semiconductor device and related semiconductor device structures are provided. In some embodiments, methods may include forming an NMOS gate dielectric and a PMOS gate dielectric over a substrate and forming a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. In some embodiments, methods may also include, removing the first work function metal over the NMOS gate dielectric and forming a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. In some embodiments, related semiconductor device structures may include an NMOS gate dielectric and a PMOS gate dielectric disposed over a semiconductor substrate. A PMOS gate electrode may be disposed over the PMOS gate dielectric and the PMOS gate electrode may include a first work function metal disposed over the PMOS gate dielectric and a second work function metal disposed over the first work function metal. A NMOS gate electrode may be disposed over the NMOS gate dielectric and the NMOS gate electrode may include the second work function metal.