Nanosheet Gate Inner Spacer Process for CD and LWR Control
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Solution Overview
Problem
As the minimum feature sizes in semiconductor devices are reduced, challenges arise in controlling critical dimensions (CD) and line width roughness (LWR) of sacrificial epitaxial layers, which can lead to issues such as increased line width roughness, epi damage, and metal gate to metal drain shorts.
Innovation Solution
The method involves forming an epitaxial stack with sacrificial and channel epitaxial layers, patterning to form fins, and performing pre-treatment operations to remove impurities from the sacrificial epitaxial layers. This includes applying Hydrogen and Nitrogen radicals and a hydrogen fluoride flush to reduce impurities, followed by recessing the sacrificial layers and forming inner spacers to control CD and LWR.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If minimum feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but controlling critical dimensions and line width roughness of sacrificial epitaxial layers becomes more difficult
Solution Approach 1:
The patent applies preliminary action by performing pre-treatment operations on the sacrificial epitaxial layers before recessing. This includes exposing the layers to hydrogen and nitrogen radicals to remove impurities such as carbon, water, and oxygen. By preparing the sacrificial layers in advance with proper cleaning and impurity removal, the subsequent recessing process achieves better critical dimension control and reduced line width roughness, enabling successful scaling to smaller feature sizes.
2Quantity of substance
If minimum feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but line width roughness of sacrificial epitaxial layers increases
Solution Approach 1:
The patent applies preliminary action by performing pre-treatment operations on the sacrificial epitaxial layers before recessing. This includes exposing the layers to hydrogen and nitrogen radicals to remove impurities such as carbon, water, and oxygen. By preparing the sacrificial layers in advance with proper cleaning and impurity removal, the subsequent recessing process achieves better critical dimension control and reduced line width roughness, enabling successful scaling to smaller feature sizes.
Solution Approach 2:
The patent applies parameter changes by modifying the physical and chemical state of the sacrificial epitaxial layers through radical exposure. The hydrogen and nitrogen radicals change the surface chemistry and remove impurities, fundamentally altering the material properties to achieve smoother line widths and better dimensional control at scaled dimensions.
3Manufacturing precision
If pre-treatment operations are performed to remove impurities from sacrificial epitaxial layers, then line width roughness is reduced and critical dimension control is improved, but additional process steps are required
Solution Approach 1:
The patent merges multiple process functions into the pre-treatment operation. The same hydrogen and nitrogen radical exposure that removes impurities also performs surface preparation and cleaning in a single integrated step. This combination of functions achieves the necessary critical dimension control without requiring multiple separate process steps, thereby reducing overall process complexity.
4Reliability
If pre-treatment operations are performed to remove impurities from sacrificial epitaxial layers, then epi damage is prevented, but additional process steps are required
Solution Approach 1:
The patent merges multiple process functions into the pre-treatment operation. The same hydrogen and nitrogen radical exposure that removes impurities also performs surface preparation and cleaning in a single integrated step. This combination of functions achieves the necessary critical dimension control without requiring multiple separate process steps, thereby reducing overall process complexity.
Solution Approach 2:
The patent converts potentially harmful impurities (carbon, water, oxygen) into removable byproducts through radical exposure. The impurities that would normally cause epi damage during recessing are transformed into volatile compounds that can be easily removed, turning a harmful presence into a beneficial cleaning process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces line width roughness, improves critical dimension control, and prevents epi damage, leading to enhanced semiconductor device performance and yield.
Implementation Method 1
performing pre-treatment operations to remove impurities from the at least one sacrificial epitaxial layer, wherein performing pre-treatment operations include: applying Hydrogen (H*) radicals and Nitrogen (N*) radicals to the at least one sacrificial epitaxial layer and the at least one channel epitaxial layer
Implementation Method 2
applying a hydrogen fluoride (HF) flush to remove byproducts from applying the H* and N* radicals
Data Source
AI summary
A semiconductor fabrication method includes: forming, on a substrate, an epitaxial stack comprising at least one sacrificial epitaxial layer and at least one channel epitaxial layer; forming a fin in the epitaxial stack; forming a sacrificial gate stack on channel regions of the fin; forming gate sidewall spacers on sidewalls of the sacrificial gate stack; performing pre-treatment operations to remove impurities from the at least one sacrificial epitaxial layer; recessing the at least one sacrificial epitaxial layer to form a cavity; forming inner spacer material in the cavity; forming source/drain features; removing the sacrificial gate stack and the at least one sacrificial epitaxial layer in the fins; and forming a metal gate to replace the sacrificial gate stack and the at least one sacrificial epitaxial layer, wherein the inner spacers have sufficient thickness to resist epi damage.