Selective Gate Spacer Removal in FinFET Fabrication
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Solution Overview
Problem
Existing FinFET device fabrication methods are inadequate in forming gate spacers, as they struggle to remove spacer layers over fin features without etching the gate stack, leading to potential defects and reduced device performance.
Innovation Solution
The method involves using an angle-plasma etch process to selectively remove spacer layers along the sidewalls of fin features in the source/drain region without etching the gate spacer, and modifying the spacer layer's etch selectivity to ensure the gate spacer remains intact, employing a combination of angle-plasma etching and ion implantation to achieve this selectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to remove spacer layers, then the spacer layers over fin features can be removed, but the gate stack is also etched causing defects and reduced device performance
Solution Approach 1:
The patent applies local quality by implanting ions into specific regions of the spacer layer - namely the spacer layer over the fin feature - to modify its etch selectivity locally. This creates a differentiated etch response where only the desired spacer layer is removed while the gate stack spacer remains intact, resolving the contradiction between complete spacer removal and gate stack protection
2Reliability
If angle-plasma etch is used to selectively remove spacer layers, then the gate spacer integrity is maintained, but the process complexity increases
Solution Approach 1:
The patent employs preliminary action by performing ion implantation on the spacer layer before the etching process. This pre-modification of the spacer layer's etch selectivity through ion implantation enables subsequent selective removal using angle-plasma etch, achieving reliable gate spacer protection while managing process complexity through preparatory treatment
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively exposes fin features for subsequent source/drain formation without compromising the gate spacer, enhancing device performance by preventing epitaxial mushroom defects and maintaining the integrity of the gate stack.
Implementation Method 1
an angle-plasma etch process to selectively remove spacer layers along the sidewalls of fin features
Implementation Method 2
modifying the spacer layer's etch selectivity to ensure the gate spacer remains intact, employing a combination of angle-plasma etching and ion implantation
Data Source
AI summary
A method of fabricating a semiconductor device includes forming a fin feature over a substrate having a first region and a second region, forming a gate stack over the fin feature in the first region and forming a spacer layer over the gate stack in the first region and over the fin feature in the second region. The spacer layer is disposed along sidewalls of the gate stack and the fin feature, respectively. The method also includes removing the spacer layer along sidewalls of the fin feature in the second region without removing the spacer layer along sidewalls of the gate stack in the first region.