Gate Spacer on Isolation Region for Leakage Current Control
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Solution Overview
Problem
Leakage current issues arise between gate patterns and source/drain regions in semiconductor devices with 3D fin active regions due to step differences with isolation regions, leading to electrical malfunctions and increased power consumption.
Innovation Solution
The implementation of gate spacers with etch selectivity, including inner and outer spacers made of silicon nitride and carbon-containing materials, respectively, which extend onto isolation regions and form a U-shaped sectional view, along with capping spacers with a concave bowl shape, to create air spaces and prevent electrical shorts between source/drain regions and gate patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If gate patterns extend onto fin active regions with 3D structure, then device integration and functionality are improved, but leakage current is generated between gate patterns and source/drain regions due to step differences with isolation regions
Solution Approach 1:
A spacer structure is introduced as an intermediary element between the gate pattern and the source/drain region. This spacer extends from the gate pattern onto the isolation region, creating a physical barrier that prevents direct electrical contact and blocks the leakage current path generated by step differences at the interface between 3D fin active regions and isolation regions.
Solution Approach 2:
The gate structure is segmented into multiple components: the gate pattern itself, the spacer extending onto the isolation region, and the source/drain region separated by the spacer. This segmentation creates distinct electrical zones and prevents the formation of continuous leakage current paths across the step differences.
2Ease of manufacture
If conventional isolation structures are used without spacers, then manufacturing simplicity is maintained, but electrical shorts occur between gate patterns and source/drain regions
Solution Approach 1:
The spacer acts as a mediator structure that is integrated into the conventional isolation architecture. It provides the necessary electrical isolation function to prevent shorts between gate patterns and source/drain regions while maintaining compatibility with existing manufacturing processes for forming isolation regions and gate structures.
Data Source
AI summary
A semiconductor device including a fin active region protruding from a substrate and an isolation region defining the fin active region, a gate pattern intersecting the fin active region and the isolation region, and gate spacer formed on a side surface of the gate pattern and extending onto a surface of the isolation region is provided.


