Gate Spacer Segmentation for Metal Gate Yield
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Solution Overview
Problem
The miniaturization and high functionality of semiconductor devices make the structural differences in transistors critical, and the replacement of polysilicon gate electrodes with metal gate electrodes poses challenges in manufacturing, particularly in the gate last or replacement gate processes, affecting production yield.
Innovation Solution
The method involves creating semiconductor devices with specific configurations of active fin arrays, gate spacers, and gate electrodes, including recesses in the spacers to optimize the placement and width of gate electrodes, improving the separation of dummy gate electrodes and enhancing production yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal gate electrode is used to replace polysilicon gate electrode, then device performance is improved, but manufacturing complexity increases
Solution Approach 1:
The gate spacer is divided into three distinct regions (first region on first active fin array, second region on second active fin array, and third region between them), allowing selective removal of the third region to separate dummy gate electrodes while maintaining gate spacer structure for supporting actual gate electrodes
Solution Approach 2:
Different regions of the gate spacer have different widths (first width, second width, and third width), with the third region having a smaller width than the first and second regions. This local variation enables precise control over where dummy gate electrodes are separated while maintaining structural integrity elsewhere
2Manufacturing precision
If dummy gate electrodes are separated, then manufacturing precision is improved, but production yield decreases
Solution Approach 1:
The gate spacer structure is formed in advance with the third region having a reduced width before dummy gate electrode separation. This preliminary structural preparation enables clean separation of dummy gate electrodes without requiring additional complex processing steps that would reduce production yield
3Manufacturing precision
If gate spacer structure is optimized, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The gate spacer is segmented into three functional regions with different widths, where each region serves a specific purpose: supporting gate electrodes on active fin arrays and enabling separation in the intermediate region
Solution Approach 2:
Instead of adding complex structures to separate dummy gate electrodes, the invention removes a portion of the gate spacer (third region) to create separation, simplifying the overall approach while maintaining manufacturing precision
Data Source
AI summary
A semiconductor device is provided including first and second active fin arrays on a substrate. The semiconductor device further includes a pair of first gate spacers disposed on the first and second active fin arrays, each of the pair of first gate spacers including a first region having a first width, a second region having a second width, and a third region between the first region and the second region and having a third width; and first and second gate electrodes, the first gate electrode disposed between the first regions and the second gate electrode disposed between the second regions. The first regions are on the first active fin array, the second regions are on the second active fin array, and the third regions are between the first active fin array and the second active fin array. Each of the first and second widths is greater than the third width.