Gate Structures with Barrier-Metal Tuning for FET Threshold Voltages
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Solution Overview
Problem
The challenge in semiconductor manufacturing is forming field effect transistors (FETs) with different threshold voltages on the same substrate while managing the constraints of gate structure geometries and WFM layer thicknesses, especially in gate-all-around (GAA) FETs and finFETs, which becomes increasingly difficult with scaling down.
Innovation Solution
The solution involves forming NFETs and PFETs with similar WFM layer thicknesses but different threshold voltages by adjusting the thickness and material composition of barrier metal layers in the gate structures, including interfacial oxide, high-k gate dielectric, and work function metal oxide layers, to achieve distinct effective work function values and threshold voltages without varying WFM layer thicknesses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional methods are used to form FETs with different threshold voltages, then threshold voltage differentiation is achieved, but device complexity and manufacturing complexity increase
Solution Approach 1:
The patent applies local quality by varying the barrier metal layer thickness at different spatial locations (first barrier metal layer thicker than second barrier metal layer) to create different effective work functions in different regions of the gate structure, enabling threshold voltage differentiation without increasing overall device complexity
Solution Approach 2:
The patent changes the thickness parameter of barrier metal layers to adjust the effective work function of the gate structure. By controlling the thickness of first and second barrier metal layers differently, the patent achieves different threshold voltages for NFET and PFET while maintaining similar WFM layer thicknesses
2Reliability
If WFM layer thickness is varied to achieve different threshold voltages, then threshold voltage control is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent varies the barrier metal layer thickness instead of WFM layer thickness to achieve different effective work functions. The first barrier metal layer has greater thickness than the second barrier metal layer, creating local quality differences that result in different threshold voltages while keeping WFM layer thicknesses similar, thereby reducing manufacturing precision requirements
Solution Approach 2:
The barrier metal layers serve as intermediary elements between the WFM layers and the high-k gate dielectric. By adjusting barrier metal layer thickness rather than WFM layer thickness, the patent indirectly controls the effective work function, acting as a mediator that reduces the direct precision requirements on WFM layer deposition
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for the fabrication of FETs with lower gate resistance and smaller dimensions, providing reliable gate structures with different threshold voltages on the same substrate in a cost-effective and less complicated manner compared to traditional methods.
Implementation Method 1
using WFM oxide layers that induce dipole layers, allowing for the tuning of threshold voltages without altering WFM layer thicknesses
Data Source
AI summary
A semiconductor device with different gate structure configurations and a method of fabricating the same are disclosed. The semiconductor device includes first and second pair of source/drain regions disposed on a substrate, first and second nanostructured channel regions, and first and second gate structures with effective work function values different from each other. The first and second gate structures include first and second high-K gate dielectric layers, first and second barrier metal layers with thicknesses different from each, first and second work function metal (WFM) oxide layers with thicknesses substantially equal to each other disposed on the first and second barrier metal layers, respectively, a first dipole layer disposed between the first WFM oxide layer and the first barrier metal layer, and a second dipole layer disposed between the second WFM oxide layer and the second barrier metal layer.