Gate Structure Fabrication Using Conductive Spacer Alignment
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Solution Overview
Problem
Conventional methods for fabricating memory cells and peripheral circuits face challenges such as alignment errors, short channel effects, and poor thermal stability due to issues like SCE and dopant diffusion, particularly in CMOS transistors with metal gates.
Innovation Solution
A method involving the sequential formation of pad oxide, pad conductive, and dielectric layers on a substrate, followed by the creation of conductive spacers and recesses, and the use of gate oxide and conductive layers with a cap layer to define the gate structure, which reduces alignment errors and protects against dopant diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a recess channel process is conducted to elongate the channel length, then short channel effect is reduced, but alignment error exists between the patterning photo-resistant layer and the conductive layer
Solution Approach 1:
The conductive spacer serves as a self-aligned structure that automatically defines the gate position without requiring separate photolithography alignment steps. The spacer is formed by conformal deposition on the recessed channel region, ensuring precise spatial relationship between the gate and channel automatically
Solution Approach 2:
The conductive spacer acts as an intermediary structure that bridges the recessed channel region and the gate electrode. It provides a physical reference that eliminates alignment errors between different processing steps by serving as the direct template for gate formation
2Reliability
If a metal gate process is performed to replace poly-silicon gate, then short channel effect in PMOS transistors is resolved, but poor thermal stability and undesired gate dopant diffusion occur
Solution Approach 1:
The gate structure uses a composite material system consisting of a conductive spacer (first material) and a gate electrode (second material) with different properties. The conductive spacer provides structural stability and doping barrier during thermal processes, while the gate electrode provides the necessary electrical characteristics for resolving short channel effect
Solution Approach 2:
The gate structure is segmented into two distinct parts: the conductive spacer formed in the recessed channel region and the gate electrode formed thereon. This segmentation allows each component to perform its specific function independently - the spacer provides thermal stability and prevents dopant diffusion, while the electrode provides electrical functionality
Data Source
AI summary
A method for fabricating a gate structure is provided. A pad oxide layer, a pad conductive layer and a dielectric layer are sequentially formed over a substrate. A portion of the dielectric layer is removed to form an opening exposing a portion of the pad conductive layer. A liner conductive layer is formed to cover the dielectric layer and the pad conductive layer. A portion of the liner conductive layer and a portion of the pad conductive layer are removed to expose a surface of the pad oxide layer to form a conductive spacer. The pad oxide layer is removed and a gate oxide layer is formed over the substrate. A first gate conductive layer and a second gate conductive layer are sequentially formed over the gate oxide layer. A portion of the gate oxide layer is removed and a cap layer to fill the opening.