Gate Trench Power Devices With Localized Deep Shield Connections
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Solution Overview
Problem
Conventional gate trench power MOSFETs face challenges in maintaining channel area effectiveness due to deep shielding connection patterns that sacrifice significant transistor channel area for electrical connectivity, leading to reduced performance and reliability issues from high electric fields in the gate oxide layer.
Innovation Solution
The implementation of deep shielding connection patterns that electrically connect deep shielding regions to the source contact with minimal channel area sacrifice, using striped heavily-doped p-type material that extends only partially along the sidewalls of the gate trenches, and the formation of source contacts that directly contact deep shielding regions, allowing for reduced channel area disruption and enhanced electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If deep shielding connection patterns are implemented to electrically connect deep shielding regions to source contact, then electrical connectivity and reliability are improved, but transistor channel area is significantly sacrificed
Solution Approach 1:
The patent applies local quality by making the deep shielding connection patterns highly localized - they are positioned only at critical regions where electrical connection is needed, rather than extending across the entire channel area. This allows the connection patterns to provide necessary electrical connectivity while minimizing the sacrifice of transistor channel area, as the dopant patterns are concentrated in specific locations rather than distributed broadly.
2Reliability
If deep shielding connection patterns extend along sidewalls of gate trenches, then electrical connection is established, but channel area is reduced and device performance deteriorates
Solution Approach 1:
The patent applies partial action by implementing deep shielding connection patterns that extend only partially along the sidewalls of gate trenches, rather than covering the entire sidewall length. This partial extension is sufficient to establish the necessary electrical connection between deep shielding regions and source contact, while avoiding excessive occupation of channel area that would harm device performance.
3Reliability
If striped heavily-doped p-type material is used for deep shielding connection patterns, then electrical connectivity is enhanced, but manufacturing complexity increases
Solution Approach 1:
The patent applies parameter changes by utilizing heavily-doped p-type material with specific doping concentrations and patterns to create the deep shielding connection patterns. By changing the material parameters (doping type, doping concentration, pattern geometry), the patent achieves enhanced electrical connectivity while the manufacturing process remains integrated into existing semiconductor fabrication techniques, thus limiting the increase in manufacturing complexity.
Data Source
AI summary
A power semiconductor device comprises a semiconductor layer structure having a wide band-gap drift region having a first conductivity type, a gate trench having first and second opposed sidewalls that extend in a first direction in an upper portion of the semiconductor layer structure, first and second well regions having a second conductivity type in the upper portion of the semiconductor layer structure, the first well region comprising part of the first sidewall and the second well region comprising part of the second sidewall. A deep shielding region having the second conductivity type is provided underneath the gate trench, and a plurality of deep shielding connection patterns that have the second conductivity type are provided that electrically connect the deep shielding region to the first and second well regions. The deep shielding connection patterns are spaced apart from each other along the first direction.