Gate-Tunable MoS2-SWCNT Heterojunction Diode
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The absence of a gate-tunable p-n heterojunction diode derived from ultrathin materials limits the fabrication of complex electronic and optoelectronic circuits, as bulk semiconductor p-n junctions lack control over doping profiles and atomically thin semiconductors require innovative doping strategies.
Innovation Solution
A gate-tunable p-n heterojunction diode is created by vertically stacking monolayer molybdenum disulphide (MoS2) flakes and sorted semiconducting single-walled carbon nanotubes (SWCNTs), allowing for tunable electrical characteristics and optical response through a capacitively coupled gate voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bulk semiconductor p-n junctions are used, then device fabrication is straightforward, but control over doping profile is minimal
Solution Approach 1:
The patent changes the fundamental parameter of material dimension from bulk to atomically thin (2D) semiconductors. This dimensional change enables electrostatic doping via gate voltage, providing precise control over doping profiles that is impossible in bulk semiconductors where doping is limited to diffusion or implantation methods.
Solution Approach 2:
The patent replaces the mechanical/chemical doping processes (diffusion or implantation of substitutional impurities) with an electrostatic field-based doping mechanism. By applying voltage to a capacitively coupled gate electrode, the atomically thin semiconductor layers are electrostatically doped, eliminating the need for complex doping machinery and processes.
2Manufacturing precision
If atomically thin semiconductors are used, then electrostatic doping control is achieved, but device complexity increases
Solution Approach 1:
The patent transitions from planar 2D heterostructures to vertically stacked 3D heterostructures. By stacking atomically thin semiconductor layers in the vertical dimension, the device achieves complex functionality while maintaining compatibility with standard semiconductor fabrication processes, thus managing complexity effectively.
Solution Approach 2:
The patent divides the semiconductor structure into multiple atomically thin layers with different materials and doping types (p-type and n-type). This segmentation allows independent control and optimization of each layer's properties, enabling precise doping control while maintaining manufacturability through modular fabrication approaches.
3Power
If graphene is used in heterostructures, then field-effect tunneling performance is improved, but current rectification is prevented due to gapless nature
Solution Approach 1:
The patent introduces band gaps locally at the heterojunction interfaces between different 2D semiconductor materials. While the individual layers may have different electronic properties, the interface regions develop localized band structures that enable both field-effect tunneling and current rectification, resolving the contradiction between these two functions.
Solution Approach 2:
The patent creates composite heterostructures by combining different atomically thin semiconductor materials (such as MoS2, WS2, and other transition metal dichalcogenides) with complementary properties. This composite approach allows the device to simultaneously achieve field-effect tunneling from one material and current rectification from the heterojunction between materials with different band structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The diode exhibits a wide range of charge transport behaviors from insulating to highly rectifying, with a forward-to-reverse current ratio exceeding 10^4, and a photoresponse time less than 15 μs and external quantum efficiency greater than 25%, enabling versatile electronic and optoelectronic applications.
Implementation Method 1
atomically thin semiconductors can be electrostatically doped by applying a bias to a capacitively coupled gate electrode
Implementation Method 2
p-n heterojunction diode... vertically stacked heterojunction of two ultrathin semiconductors
Data Source
AI summary
A method of fabricating a diode includes forming a first semiconductor layer having a first portion and a second portion extending from the first portion on a substrate; forming first and second electrodes on the substrate, the first electrode extending over and being in contact with the first portion of the first semiconductor layer; forming an insulting film to cover the first electrode and the first portion of the first semiconductor layer; and forming a second semiconductor layer having a first portion and a second portion extending from the first portion on the substrate. The second portion of the second semiconductor layer overlapping with the second portion of the first semiconductor layer to define a vertically stacked heterojunction therewith. The first portion of the second semiconductor layer extending over and being in contact with the second electrode. Each of the first and second semiconductor layers includes an atomically thin semiconductor.