Gated Diode Memory Cell Voltage Gain

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Solution Overview

Problem

Conventional DRAM cells, such as 1T1C and 2T1C, face limitations in cell voltage gain during read operations, resulting in voltage drops or constant voltages, which affect sensing signal quality and speed.

Innovation Solution

The introduction of gated diode memory cells, which include transistors and a gated diode in communication, allowing for charge transfer and nonlinear voltage boosting, enabling cell voltage gain greater than 1 during read operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If conventional 1T1C DRAM cell is used, then device complexity is reduced, but cell voltage gain is limited and voltage drop occurs during read operation

Engineering Contradiction:
Improvememory cell structureVSAvoidcell voltage gain
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent changes the fundamental parameter of the storage element from a linear capacitor to a nonlinear gated diode. The gated diode exhibits voltage-dependent capacitance characteristics that enable voltage gain during read operations. By utilizing the nonlinear C-V characteristics of the gated diode, the cell achieves voltage amplification rather than voltage division, directly resolving the contradiction between simplicity and voltage gain.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional 2T1C DRAM cell is used, then cell voltage gain is improved to 1, but sensing signal strength is still limited

Engineering Contradiction:
Improvecell voltage gainVSAvoidsensing signal strength
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent transitions from linear capacitor-based storage to nonlinear gated diode storage, fundamentally changing the voltage transfer characteristics. The gated diode's nonlinear capacitance enables voltage gain greater than 1 during read operations, significantly boosting sensing signal strength beyond what conventional 2T1C cells can achieve.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If linear capacitor is used for storage, then charge transfer is limited by capacitance ratio, but if gated diode is used, then nonlinear operations enable voltage gain

Engineering Contradiction:
Improvevoltage gainVSAvoidstorage element structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces the linear capacitor with a gated diode that exhibits nonlinear capacitance characteristics. This parameter change enables the storage element to actively participate in voltage amplification through its nonlinear C-V characteristics, transforming the read operation from passive charge sharing to active voltage gain.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The gated diode utilizes its own internal nonlinear capacitance characteristics to generate voltage gain without requiring external amplification circuits. The storage element itself provides the amplification function through its voltage-dependent capacitance, making the system self-sufficient and eliminating the need for additional complex circuitry.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances sensing signal and speed by achieving voltage gain during read operations, improving the performance of dynamic memory cells beyond conventional capabilities.

Implementation Method 1

allows for charge transfer to a bitline or read device, enabling voltage gain and improved sensing signals through nonlinear operations during read operations

Methodology Applied
Scientific EffectCharge transfer:

Data Source

PatentUS8445946B2Gated diode memory cells
Publication Date: 2013.05.21 GLOBALFOUNDRIES US INC
  • US8445946B2 patent drawing
  • US8445946B2 patent drawing
  • US8445946B2 patent drawing

AI summary

A gated diode memory cell is provided, including one or more transistors, such as field effect transistors (“FETs”), and a gated diode in signal communication with the FETs such that the gate of the gated diode is in signal communication with the source of a first FET, wherein the gate of the gated diode forms one terminal of the storage cell and the source of the gated diode forms another terminal of the storage cell, the drain of the first FET being in signal communication with a bitline (“BL”) and the gate of the first FET being in signal communication with a write wordline (“WLw”), and the source of the gated diode being in signal communication with a read wordline (“WLr”).