Gated Ring Oscillator ADC Noise Shaping for High-Bandwidth Low Power
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Analog-to-digital converters (ADCs) face challenges in meeting power consumption requirements, especially in high-bandwidth telecommunications, due to the power-hungry operational amplifiers used in continuous time delta sigma modulators and the limited resolution of voltage-controlled oscillator-based quantizers, making them impractical for ultra-high-speed applications.
Innovation Solution
The implementation of noise-shaping enhanced gated ring oscillator (GRO)-based ADCs, which include a delay for feedback error signal, a voltage-to-time converter, a GRO for phase signal generation, a quantization device, and a time-to-digital converter to digitize quantization errors, providing additional noise shaping and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If continuous time delta sigma modulators are used to achieve high bandwidth, then bandwidth is improved, but power consumption increases due to operational amplifiers
Solution Approach 1:
The patent extracts and removes the operational amplifiers from the system by using a gated ring oscillator-based quantizer instead. This eliminates the power-hungry analog building blocks while maintaining the high bandwidth capability through a purely digital oscillating structure that does not require high-power op-amps for signal processing.
Solution Approach 2:
The patent replaces the analog operational amplifier-based continuous time delta sigma modulator with a digital gated ring oscillator system. This substitution transitions from an analog mechanical/electrical system to a digital logic-based system, achieving high bandwidth through digital oscillation and counting mechanisms rather than analog signal processing.
2Use of energy by moving object
If voltage-controlled oscillator based quantizers are used to eliminate operational amplifiers, then power consumption is reduced, but resolution is limited by nonlinearity
Solution Approach 1:
Instead of using a voltage-controlled oscillator that converts voltage to frequency (suffering from V-to-F nonlinearity), the patent inverts the approach by using a gated ring oscillator where a digital control signal directly gates the oscillation. This inversion eliminates the nonlinear voltage-to-frequency conversion stage, providing both low power consumption and high resolution through clean digital control.
Solution Approach 2:
The patent replaces the analog voltage-controlled oscillator with a digital gated ring oscillator system. This substitution eliminates the nonlinear analog voltage-to-frequency conversion by using digital logic gates to control the ring oscillator, thereby achieving both low power consumption and high measurement precision through digital control mechanisms.
3Measurement precision
If higher order MASH structures are cascaded to achieve higher noise shaping order, then noise shaping is improved, but quantization noise becomes narrower and problematic
Solution Approach 1:
The patent segments the noise shaping function into multiple independent gated ring oscillator stages, each contributing a portion of the overall noise shaping order. By dividing the system into modular stages that can be independently designed and optimized, the patent achieves high-order noise shaping without the quantization noise narrowing problem that occurs in cascaded MASH structures, as each stage operates with its own wideband quantizer.
Data Source
AI summary
A noise-shaping enhanced (NSE) gated ring oscillator (GRO)-based ADC includes a delay which delays and feedbacks an error signal to an input of the NSE GRO-based ADC. The feedback error signal provides an order of noise-shaping and the error signal is generated at the input of the NSE GRO-based ADC from an input signal, the feedback error signal, and a front-end output. A voltage-to-time converter converts the error signal to the time domain. A GRO outputs phase signals from the time domain error signal by oscillating when the error signal is high and inhibiting oscillation otherwise. A quantization device quantizes the phase signals to generate the front-end output. A quantization extraction device determines a quantization error from the quantized phase signals. A time-to-digital converter digitizes the quantization error to generate a back-end output. An output device generates a second order noise-shaped output based on the front-end and the back-end outputs.