Gated Ring VCO ADC for Scalable Power and Noise Shaping
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Solution Overview
Problem
Conventional VCO-based ADCs face limitations in power scalability due to continuous oscillation and redundant switching, which affects their performance across a wide range of operating speeds, and they fail to achieve dynamic element matching and first-order noise shaping effectively.
Innovation Solution
The proposed Gated Ring VCO (GRVCO)-based ADC architecture introduces a digital dominant approach with a Gated Ring Oscillator (GRO) that allows for power scalability by controlling oscillations through a gating signal, enabling first-order noise shaping and dynamic element matching, while maintaining constant resolution performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional VCO-based ADC uses continuous oscillation to maintain operation over a wide speed range, then the ADC can operate at various sampling frequencies, but power consumption does not scale with sampling frequency due to redundant switching
Solution Approach 1:
The patent applies periodic action by gating the VCO oscillation to occur only during the integration period corresponding to each sampling cycle. The VCO is enabled periodically at the sampling rate rather than oscillating continuously, which allows power consumption to scale with the sampling frequency while maintaining the ability to operate over a wide range of speeds through clock gating control
2Measurement precision
If a ring delay line is used in an all-digital ADC, then the ADC achieves compact size and high bit-resolution, but dynamic element matching and first-order noise shaping cannot be achieved
Solution Approach 1:
The patent replaces the ring delay line with a VCO that copies the essential delay line functionality while adding capability for dynamic element matching and noise shaping. The VCO generates phase information that can be quantized to achieve the same resolution as the delay line while enabling additional signal processing capabilities through its oscillatory nature and gate control
3Measurement precision
If the sampling speed is reduced to improve bit resolution through phase information accumulation, then resolution improves, but power consumption remains high due to continuous VCO oscillation
Solution Approach 1:
The patent enables the VCO to oscillate periodically only during the integration period needed for phase accumulation, rather than continuously. By gating the VCO at the sampling rate, the system maintains resolution through phase information accumulation during active periods while eliminating power consumption during inactive periods, achieving both high resolution and power scalability
Data Source
AI summary
An Analogue to Digital Converter (ADC) having a Gated Ring Voltage Controlled Oscillator, GRVCO, to generate a phase signal according to an input voltage; and a quantization circuit to generate a quantized phase output signal according. The GRVCO operates in either a first or second mode of operation according to a gating control signal. In the first mode of operation, the GRVCO operates in a VCO mode with gating disabled. In the second mode of operation, the GRVCO operates in a GRVCO mode wherein gating is enabled or disabled according to a gating signal.