Ge-P-Se-O Switching Elements for Low-Leakage Memory Devices
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Solution Overview
Problem
Existing memory devices face challenges with high leakage current and reliability issues, particularly in three-dimensional structures with chalcogenide materials used as switching elements.
Innovation Solution
A memory device design incorporating a switching element with a specific composition of [GeX PY SeZ](1-W) [O]W, where 0.15≤X≤0.50, 0.15≤Y≤0.50, 0.35≤Z≤0.70, and 0.01≤W≤0.10, which reduces leakage current and threshold voltage drift, enhancing durability and switching performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional chalcogenide materials are used as switching elements in three-dimensional memory devices, then the memory device can achieve high integration and three-dimensional structure, but the leakage current increases and reliability deteriorates
Solution Approach 1:
The patent applies parameter changes by precisely controlling the composition ratios of Ge, P, and Se in the switching element material [GeX PY SeZ](1-W)[O]W, where 0.15≤X≤0.50, 0.15≤Y≤0.50, 0.35≤Z≤0.70, and 0.01≤W≤0.10. This compositional parameter optimization reduces leakage current while maintaining low threshold voltage, directly improving memory device reliability without sacrificing the three-dimensional structure benefits
Solution Approach 2:
The patent uses composite materials by combining multiple elements (Ge, P, Se, O) in specific ratios to create a novel switching element composition [GeX PY SeZ](1-W)[O]W. This composite material approach leverages the synergistic effects of different elements to achieve both low leakage current and low threshold voltage, resolving the contradiction between reliability improvement and harmful factor reduction
2Duration of action of stationary object
If conventional switching element materials are used, then the device structure can be simplified, but threshold voltage drift occurs and durability decreases
Solution Approach 1:
The patent stabilizes threshold voltage and improves durability by optimizing the compositional parameters of the switching element. The specific composition ranges (0.15≤X≤0.50, 0.15≤Y≤0.50, 0.35≤Z≤0.70, 0.01≤W≤0.10) are designed to prevent threshold voltage drift while maintaining structural stability, enabling the switching element to withstand repeated operation cycles without degradation
3Ease of manufacture
If conventional chalcogenide materials are used, then manufacturing processes can be maintained, but environmental contamination and health risks occur
Solution Approach 1:
The patent replaces conventional As-based chalcogenide materials with a Ge-P-Se-O based composition, changing the material parameter from containing arsenic to being arsenic-free. This substitution eliminates environmental contamination and health risks associated with arsenic while maintaining compatibility with existing manufacturing processes, as the new material can be deposited using standard thin-film deposition techniques
Solution Approach 2:
The patent converts the potential harm of using conventional chalcogenide materials (environmental contamination and health risks) into a benefit by developing an alternative composition that is environmentally friendly. The Ge-P-Se-O based switching element maintains the desired electrical characteristics while eliminating toxic elements, turning a harmful material choice into a beneficial sustainable solution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed composition significantly reduces leakage current and threshold voltage drift, improving the reliability and switching speed of the memory device while preventing environmental contamination and adverse human health effects.
Implementation Method 1
The switching element includes a material having a composition of [GeX PY SeZ](1-W) [O]W, where 0.15≤X≤0.50, 0.15≤Y≤0.50, 0.35≤Z≤0.70, and 0.01≤W≤0.10
Data Source
AI summary
A memory device includes a plurality of first conductive lines on a substrate and extending in a first direction, a plurality of second conductive lines on the plurality of first conductive lines and extending in a second direction intersecting the first direction, and a plurality of memory cells respectively between the plurality of first conductive lines and the plurality of second conductive lines. Each of the plurality of memory cells includes a switching element and a variable resistance material layer. The switching element includes a material having a composition of [GeX PY SeZ](1-W) [O]W, where 0.15≤X≤0.50, 0.15≤Y≤0.50, 0.35≤Z≤0.70, and 0.01≤W≤0.10.