GeBiTe Phase Change Memory Cell Composition Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Phase change memory devices employing GeSbTe layers face limitations in improving write speed and reducing power consumption due to high reset current requirements and long set pulse times, and doping with impurities like silicon or nitrogen can increase set pulse width while decreasing reset current.
Innovation Solution
The use of a GeBiTe layer or a doped GeTe layer as a phase change material, with specific composition ratios and impurity content, allows for reduced reset current and faster programming speed by optimizing the phase change characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If GeSbTe layer is used as phase change material, then the memory device can be fabricated with conventional processes, but the write speed is limited due to long set pulse time and power consumption is high due to high reset current
Solution Approach 1:
The patent changes the compositional parameters of the phase change material from GeSbTe to GeBiTe alloy, specifically adjusting the atomic ratios of Ge, Bi, and Te to optimize phase transition characteristics. This parameter change enables faster crystallization (shorter set pulse time) and lower melting point (reduced reset current) while maintaining compatibility with existing fabrication processes
Solution Approach 2:
The patent employs a composite alloy material GeBiTe combining multiple elements with complementary properties: Ge provides the base structure, Bi lowers the melting point and enhances crystallization speed, and Te maintains phase change characteristics. This composite material achieves superior write speed and power consumption characteristics compared to conventional GeSbTe
2Device complexity
If GeSbTe layer is used as phase change material, then the device structure is simple, but power consumption is high due to reset current of 0.8 mA to 1 mA
Solution Approach 1:
The patent modifies the compositional parameters of the phase change material to GeBiTe with specific atomic ratios, which fundamentally changes the thermal and electrical properties. The new composition achieves a lower melting point and reduced latent heat requirement, enabling reset current reduction from 0.8-1.0 mA to below 0.5 mA while keeping the device structure simple
3Use of energy by moving object
If GeSbTe layer is doped with impurities like silicon or nitrogen, then reset current is decreased, but set pulse width is increased
Solution Approach 1:
Instead of doping GeSbTe with impurities, the patent changes the fundamental compositional parameters to GeBiTe alloy. This parameter change simultaneously achieves low reset current (below 0.5 mA) and fast set pulse width (below 100 ns) by optimizing the phase transition characteristics through appropriate selection of Ge, Bi, and Te atomic ratios
Solution Approach 2:
The patent uses a composite GeBiTe material where Bi plays a crucial role in reducing both reset current and set pulse width. The synergistic combination of Ge, Bi, and Te creates a material system where phase transition occurs rapidly at lower temperatures, avoiding the trade-off present in doped GeSbTe
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The GeBiTe or doped GeTe layers enable faster programming and lower power consumption in phase change memory devices, improving integration density and operational efficiency.
Implementation Method 1
When a write current flows through the switching device and the bottom electrode, Joule heat is generated at an interface between the phase change material layer and the bottom electrode. Such Joule heat converts the phase change material layer to an amorphous state (reset state) or a crystalline state (set state).
Implementation Method 2
Such Joule heat converts the phase change material layer to an amorphous state (reset state) or a crystalline state (set state). The phase change material layer having the amorphous state exhibits a higher resistance than the phase change material layer having the crystalline state.
Data Source
AI summary
A phase change memory cell includes an interlayer insulating layer formed on a semiconductor substrate, and a first electrode and a second electrode disposed in the interlayer insulating layer. A phase change material layer is disposed between the first and second electrodes. The phase change material layer may be an undoped GeBiTe layer, a doped GeBiTe layer containing an impurity or a doped GeTe layer containing an impurity. The undoped GeBiTe layer has a composition ratio within a range surrounded by four points (A1(Ge21.43, Bi16.67, Te61.9), A2(Ge44.51, Bi0.35, Te55.14), A3(Ge59.33, Bi0.5, Te40.17) and A4(Ge38.71, Bi16.13, Te45.16)) represented by coordinates on a triangular composition diagram having vertices of germanium (Ge), bismuth (Bi) and tellurium (Te). The doped GeBiTe layer contains an impurity and has a composition ratio within a range surrounded by four points (D1(Ge10, Bi20, Te70), D2(Ge30, Bi0, Te70), D3(Ge70, Bi0, Te30) and D4(Ge50, Bi20, Te30)) represented by coordinates on the triangular composition diagram.