Germanium Oxide Gate Capping Layer for Leakage and Trap Reduction

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Solution Overview

Problem

Challenges arise during the scaling-down process of semiconductor devices, including issues with leakage, trap density, and resistance, which affect the quality, yield, performance, and reliability of these devices.

Innovation Solution

The semiconductor device incorporates a capping layer made of germanium oxide, which reduces leakage and trap density while improving performance by using a germanium-rich conductive layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional materials are used in the gate structure, then manufacturing is simpler, but leakage and trap density increase

Engineering Contradiction:
Improveleakage reductionVSAvoidgate structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate structure employs a composite material system consisting of a germanium-rich conductive layer combined with a germanium oxide capping layer. This composite structure reduces leakage and trap density by utilizing the complementary properties of germanium (high conductivity) and germanium oxide (protective capping), thereby improving reliability without excessive complexity

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The invention changes the material parameters by using a germanium-rich composition in the conductive layer and forming germanium oxide in the capping layer. This parameter change (material composition and oxidation state) directly addresses leakage and trap density issues while maintaining a manageable structural complexity

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional conductive layers are used, then resistance is higher, but material selection is more standard

Engineering Contradiction:
Improveresistance reductionVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The conductive layer uses a germanium-rich composition with controlled oxidation parameters to achieve low resistance. By adjusting the germanium content and oxidation conditions, the invention optimizes electrical resistance while maintaining ease of manufacture through established semiconductor fabrication processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The conductive layer is designed with local quality variations, being germanium-rich in specific regions to reduce resistance where needed, while maintaining compatibility with standard manufacturing processes in other aspects

Inventive Principle:
Principle #3Local quality

3Productivity

If device dimensions are scaled down, then computing ability improves, but leakage and trap density increase

Engineering Contradiction:
Improvecomputing abilityVSAvoidleakage reduction
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The composite gate structure with germanium-rich conductive layer and germanium oxide capping layer provides effective leakage control in scaled-down devices. The combination of high-conductivity germanium and protective germanium oxide maintains reliability even as device dimensions decrease and computing ability increases

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The invention uses a thin capping layer of germanium oxide that can be formed and removed relatively easily. This thin protective layer effectively reduces leakage in scaled devices without requiring complex or permanent structural changes

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of germanium oxide in the capping layer and conductive layer enhances the semiconductor device's performance by reducing leakage and resistance, thereby improving quality and reliability.

Implementation Method 1

a first capping layer positioned on the first conductive layer. The first capping layer comprises germanium oxide

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS20250344485A1Semiconductor device with capping layer
Publication Date: 2025.11.06 NAN YA TECH
  • US20250344485A1 patent drawing
  • US20250344485A1 patent drawing
  • US20250344485A1 patent drawing

AI summary

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a capping mask layer positioned on the substrate; a first gate insulating layer positioned along the capping mask layer, inwardly positioned in the substrate, and including a U-shaped cross-sectional profile; a first work function layer positioned on the first gate insulating layer; a first conductive layer positioned on the first work function layer; and a first capping layer positioned on the first conductive layer. The first capping layer includes germanium oxide. A top surface of the first capping layer and a top surface of the capping mask layer are substantially coplanar.