Getter Layer Defect Gradient for Resistive Memory
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Solution Overview
Problem
Conventional resistive switching nonvolatile memory devices require additional post-fabrication processing steps, such as electrical forming, which can be complex and potentially damaging to the material, and result in inconsistent performance due to variations in resistance state differences over time.
Innovation Solution
A resistive switching nonvolatile memory element is constructed as a metal-insulator-metal stack with a getter or defect portion that creates a region with a higher vacancy concentration, eliminating or reducing the need for electrical forming by incorporating a getter layer that reacts with freely available ions to form vacancies, thereby improving switching characteristics and consistency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional resistive switching memory devices are manufactured without additional processing steps, then manufacturing complexity is reduced, but performance consistency and reliability deteriorate due to variations in resistance state differences
Solution Approach 1:
The patent applies preliminary action by incorporating a defect layer during the initial fabrication process that pre-establishes oxygen vacancies in the resistive switching layer. This preliminary structuring eliminates the need for subsequent electrical forming steps, as the vacancies are already present to enable resistive switching. The defect layer is formed using atomic layer deposition with controlled oxygen exposure, creating a gradient of oxygen vacancies that facilitates device operation without additional processing.
Solution Approach 2:
The defect layer acts as an intermediary between the electrode and the resistive switching layer. This intermediate layer with controlled oxygen deficiency mediates the formation of conductive filaments by providing a reservoir of oxygen vacancies that can migrate into the resistive switching layer during device operation. The defect layer thus enables reliable resistive switching while being integrated into the standard fabrication process.
2Reliability
If electrical forming post-processing steps are applied, then resistive switching performance is improved, but material damage risk and manufacturing complexity increase
Solution Approach 1:
The patent eliminates the harmful electrical forming step by performing preliminary action during fabrication - creating a defect layer with controlled oxygen vacancies using atomic layer deposition. This preliminary structuring provides the necessary oxygen vacancies in advance, preventing the need for high-voltage electrical forming that could damage the resistive switching material. The defect layer is formed under controlled thermal and chemical conditions that avoid material stress.
Solution Approach 2:
The patent converts the potential harm of oxygen deficiency (which can create unwanted defects) into a benefit by deliberately engineering a defect layer with controlled oxygen vacancies. Instead of allowing random oxygen deficiencies to form during fabrication, the process intentionally creates a graded defect layer that provides controlled oxygen vacancy sources, transforming what could be a harmful defect into a useful feature that enables reliable switching without electrical forming.
3Reliability
If electrical forming steps are used to ensure consistent resistance states, then device reliability improves, but manufacturing time and process complexity increase
Solution Approach 1:
The patent achieves resistance state consistency through preliminary action by forming a defect layer during the standard atomic layer deposition fabrication sequence. This defect layer pre-provides oxygen vacancies that ensure consistent resistive switching behavior from the first device operation. By integrating the vacancy creation into the standard fabrication process rather than requiring separate electrical forming steps, manufacturing time is reduced while maintaining performance consistency.
Solution Approach 2:
The patent merges the defect creation function with the standard resistive switching layer fabrication process. The defect layer is deposited using the same atomic layer deposition equipment and process sequence used for creating the resistive switching layer, combining two functions (structural formation and defect engineering) into a single integrated process. This eliminates the need for separate electrical forming steps and reduces overall manufacturing time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and consistency of resistive switching memory devices by eliminating the need for electrical forming, reducing manufacturing complexity, and minimizing the risk of material damage, while maintaining perceivable resistance state differences.
Implementation Method 1
The getter portion has an affinity for freely available ions and reacts with the freely available ions to create vacancies (caused by the ion removal to the getter portion), which concentrate in an area adjacent the getter portion
Implementation Method 2
A sub-stoichiometric metal oxide is oxygen deficient and thus, has a greater ability to enable or inhibit vacancy movement needed to cause the resistive switching of the memory device
Data Source
AI summary
Embodiments of the present invention generally relate to a resistive switching nonvolatile memory element that is formed in a resistive switching memory device that may be used in a memory array to store digital data. The memory element is generally constructed as a metal-insulator-metal stack. The resistive switching portion of the memory element includes a getter and/or a defect portion. In general, the getter portion is an area of the memory element that is used to help form, during the resistive switching memory device's fabrication process, a region of the resistive switching layer that has a greater number of vacancies or defects compared to the remainder of resistive switching layer. The defect portion is an area of the memory element that has a greater number of vacancies or defects compared to the remainder of the resistive switching layer, and is formed during the resistive switching memory device's fabrication process.