GFP Demapper Parallel Frame Delineation
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Solution Overview
Problem
As bandwidth demands increase, existing GFP demappers struggle to efficiently delineate and unpack GFP frames on wide data buses, leading to difficulties in frame delineation and packetization, especially with wide data paths.
Innovation Solution
A GFP framer system that generates core header candidates, processes them into candidate tours, and delineates frame boundaries using a candidate processor and frame delineator, allowing for simultaneous delineation of multiple frames and scalable implementation with a linear increase in gate count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional byte-by-byte frame delineation is used, then implementation simplicity is maintained, but processing speed and efficiency deteriorate on wide data buses
Solution Approach 1:
The patent divides the wide data bus into multiple segments or lanes, allowing parallel processing of frame delineation across different segments. This segmentation enables the system to handle wide bus data efficiently without requiring complex single-cycle delineation logic, thus improving productivity while managing device complexity.
Solution Approach 2:
The patent introduces a new dimension of processing by implementing multi-stage delineation logic that processes frames across multiple clock cycles or stages rather than attempting single-cycle delineation. This dimensional approach to time-multiplexed processing allows efficient handling of wide bus data without proportionally increasing logic complexity.
2Quantity of substance
If data path width is increased to meet bandwidth demands, then bandwidth capacity is improved, but frame delineation difficulty increases
Solution Approach 1:
The patent segments the wide data path into multiple narrower processing channels that can be handled independently. This allows the system to maintain high bandwidth capacity while reducing the complexity of frame delineation in each individual channel, as the delineation logic operates on smaller, more manageable data widths.
Solution Approach 2:
The patent implements preliminary processing stages that prepare the wide bus data for delineation before the actual frame boundary detection occurs. This preliminary action includes initial synchronization and data organization that simplifies the subsequent delineation process, making it easier to detect frame boundaries even on wide data paths.
3Productivity
If multiple GFP frames are delineated simultaneously on wide bus, then throughput is improved, but synchronization complexity increases
Solution Approach 1:
The patent divides the simultaneous frame delineation process into multiple independent segments or lanes, each handling a portion of the frames. This segmentation allows parallel processing of multiple frames while maintaining simpler synchronization logic within each segment, thus improving throughput without proportionally increasing synchronization complexity.
Solution Approach 2:
The patent introduces a hierarchical dimension to synchronization, implementing both intra-segment and inter-segment synchronization mechanisms. This multi-level approach allows the system to manage simultaneous frame delineation across wide buses by breaking down the complex synchronization problem into manageable hierarchical layers.
Data Source
AI summary
A system and method of delineating GFP data. The GFP framer comprises a candidate generator for generating an array of core header candidates from a data word received on a data bus, a candidate processor for generating a plurality of candidate tours and a frame delineator for identifying a candidate tour as an active tour and delineating the boundaries of the GFP frames defined by the active tour. Each core header candidate defines a reference position of one of the plurality of candidate tours. Each of the plurality of candidate tour comprises a record of core header positions for a series of GFP frames from the data word.