Non-volatile Semiconductor Storage Device GIDL Erase Control
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Solution Overview
Problem
Lamination-type non-volatile semiconductor storage devices face inefficiencies in erase operations due to their columnar semiconductor layers, making it difficult to perform erase operations similar to planar-type devices.
Innovation Solution
A non-volatile semiconductor storage device design that includes a memory string with a columnar semiconductor layer, an electric charge storage layer, and a conductive layer, along with a control circuit that boosts voltages to induce a Gate Induced Drain Leakage (GIDL) current for efficient erase operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If lamination-type non-volatile semiconductor storage devices use columnar semiconductor layers, then bit density can be improved through vertical stacking, but erase operation efficiency deteriorates compared to planar-type devices
Solution Approach 1:
The patent applies parameter changes by modifying voltage levels during erase operations. Specifically, it uses a first voltage for selecting memory cells and a second voltage (higher than the first) for erasing, with the voltage difference carefully controlled to be less than a threshold value. This voltage parameter optimization enables efficient erase operations in lamination-type devices while maintaining the benefits of vertical stacking for high bit density.
2Productivity
If additional circuits are added to improve erase operation efficiency in lamination-type devices, then erase efficiency can be improved, but device complexity and occupation area increase
Solution Approach 1:
The patent employs self-service by utilizing the existing control circuit's voltage control capabilities to achieve efficient erase operations. Instead of adding dedicated erase circuits, the system leverages the current circuit architecture and control logic, optimizing existing components to perform the erase function effectively. This approach improves erase efficiency while avoiding the complexity increase that would result from adding separate circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient data erase operations in lamination-type devices by creating a GIDL current, allowing for effective voltage boosting without the need for additional circuits, thus improving erase efficiency and reducing occupation area.
Implementation Method 1
the control circuit being configured to boost voltages of the second wiring and the first wiring in the erase operation, while keeping the voltage of the first wiring greater than the voltage of the second wiring by a certain potential difference, the certain potential difference being a potential difference that causes a gate induced drain leakage (GIDL) current
Data Source
AI summary
A non-volatile semiconductor storage device includes: a memory string including a plurality of memory cells connected in series; a first selection transistor having one end connected to one end of the memory string; a first wiring having one end connected to the other end of the first selection transistor; a second wiring connected to a gate of the first selection transistor. A control circuit is configured to boost voltages of the second wiring and the first wiring in the erase operation, while keeping the voltage of the first wiring greater than the voltage of the second wiring by a certain potential difference. The certain potential difference is a potential difference that causes a GIDL current.