Glass Core IC Substrates with Photo-Imageable Dielectric

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Solution Overview

Problem

Traditional approaches to routing signal transmission lines on glass cores in integrated circuit packages are insufficient due to a large delta in coefficient of thermal expansion (CTE) between glass and copper, leading to delamination and increased manufacturing costs, especially when using organic buffer layers that are non-patternable and require additional processing steps.

Innovation Solution

The implementation of a photo-imageable dielectric (PID) material on the glass core, with metal interconnects deposited directly on the PID material, eliminating the need for a transition layer and allowing for direct routing on the glass core, while using an adhesion layer and seed layer to enhance adhesion and conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional organic buffer layers are used between glass core and copper traces, then adhesion is improved, but manufacturing complexity increases due to additional non-patternable layers and processing steps

Engineering Contradiction:
ImproveadhesionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the traditional organic buffer layer from the structure. Instead of using a separate buffer layer, the glass core itself is prepared with surface treatments (etching, plasma treatment, or chemical modification) to provide direct adhesion for the copper traces, eliminating the intermediate layer and simplifying the manufacturing process

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces adhesion promoters or coupling agents that are applied directly to the glass core surface. These promoters serve as intermediaries between the glass and copper, providing chemical bonding groups that enhance adhesion without requiring a separate organic buffer layer structure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If direct copper routing on glass core is implemented, then manufacturing steps are reduced, but delamination occurs due to large CTE mismatch between glass and copper

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddelamination resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent modifies the surface properties of the glass core through etching, plasma treatment, or chemical conditioning. These treatments change the surface energy, roughness, and chemical composition of the glass, creating a surface that can thermally expand with copper while maintaining strong adhesion, thus accommodating the CTE mismatch

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite interface structure where the glass core surface is modified with adhesion promoters or coupling layers that combine the thermal stability of glass with the adhesion properties needed for copper bonding. This composite interface accommodates the CTE difference between glass and copper

Inventive Principle:
Principle #40Composite materials

3Ease of manufacture

If photo-imageable dielectric material is used on glass core, then direct metal routing is enabled, but additional material deposition steps are required

Engineering Contradiction:
Improvedirect routing capabilityVSAvoidmanufacturing cycle time
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent combines multiple functions into the photo-imageable dielectric material layer. This single layer serves as both the adhesion promoter and the routing definition medium. The metal traces are deposited directly on this layer, which is patterned using standard photolithography, eliminating the need for separate buffer layer processing

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method reduces delamination risks, simplifies the manufacturing process, and lowers costs by enabling direct metal routing on the glass core without additional transition layers, while maintaining electrical integrity and design flexibility.

Implementation Method 1

using an adhesion layer and seed layer to enhance adhesion and conductivity

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

patterning the PID material, using photolithography, to create openings in the PID material

Methodology Applied
Scientific EffectPhotolithography: Photography

Implementation Method 3

depositing copper on the glass in the openings in the PID material

Methodology Applied
Scientific EffectElectroplating: Electroplating

Implementation Method 4

depositing copper on the glass in the openings in the PID material

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS20230197540A1Electrical traces on glass cores in integrated circuit packages and methods of manufacturing the same
Publication Date: 2023.06.22 INTEL CORP
  • US20230197540A1 patent drawing
  • US20230197540A1 patent drawing
  • US20230197540A1 patent drawing

AI summary

Methods, apparatus, systems, and articles of manufacture are disclosed to enable electrical traces on glass cores in integrated circuit packages that includes an integrated circuit (IC) package substrate comprising a glass core, a photo-imageable dielectric (PID) material on the glass core, and metal interconnects in openings in the PID material.