Glass Packaging Substrate With Local Roughness for High-Frequency Wiring
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Solution Overview
Problem
Existing semiconductor packaging technologies do not adequately support the electrical performance of semiconductors due to limitations in packaging technology, particularly in high-frequency applications where surface roughness of conductive layers leads to increased resistance and poor adhesive strength, impacting signal transmission and durability.
Innovation Solution
A packaging substrate with a glass substrate and patterned metal layers featuring fine wires with controlled surface roughness and a primer layer for enhanced adhesive strength, utilizing a polymer resin and inorganic particles to ensure low resistance and efficient signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the surface roughness of electrically conductive layers is increased to improve adhesive strength, then adhesive strength between dielectric material layers and electrically conductive layers is improved, but resistance increases and electrical performance deteriorates
Solution Approach 1:
The patent applies different surface roughness characteristics to different regions of the conductive layers. Specifically, the first and second main surfaces of the common electrically conductive layer are configured with a first roughness, while the third and fourth main surfaces are configured with a second roughness. This local differentiation allows optimization of adhesive strength at interfaces requiring it, while maintaining smooth surfaces in regions where electrical performance is critical, thereby resolving the contradiction between adhesive strength and electrical performance.
2Productivity
If fine line configurations are used to increase wiring density, then wiring density is improved, but adhesive strength decreases and durability is compromised
Solution Approach 1:
The patent implements different roughness configurations for different surfaces of the common electrically conductive layer. The first and second main surfaces (which interface with dielectric layers requiring strong adhesion) are configured with a first roughness to enhance adhesive strength, while the third and fourth main surfaces are configured with a second roughness. This allows fine line configurations to achieve high wiring density while maintaining adequate adhesive strength through localized surface optimization at critical interfaces.
Data Source
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AI summary
An electronic element packaging substrate and manufacturing method are provided. The substrate includes finer wire widths, transmits signals with low resistance, and provides a compact electronic element package. The substrate may be driven with high efficiency even when high frequency power is applied thereto.