Glass Substrate Via Formation by Blind-Via Thinning

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Solution Overview

Problem

Existing methods for preparing metallized via holes in semiconductor devices using glass substrates face challenges such as high risk of substrate breakage, complex and costly processes, and low production efficiency due to the small thickness and hourglass-shaped via structures, which complicate seed layer formation and require double-sided electroplating.

Innovation Solution

A method involving forming a connection electrode in a blind via of a thicker glass substrate and then thinning it from the second surface to the first surface, using magnetron sputtering for conductive thin film deposition and chemical physical polishing to create a via hole, which reduces substrate damage and simplifies the process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a thin glass substrate is used to create via holes, then the device can be more compact and integrated, but the risk of substrate breakage increases significantly

Engineering Contradiction:
Improvesubstrate thicknessVSAvoidsubstrate breakage risk
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by forming the via holes and depositing seed layers on a thick glass substrate before thinning it to the final thickness. This sequence ensures that the substrate has sufficient mechanical strength during the via formation and electroplating processes, preventing breakage while still achieving the desired compact final device dimensions.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If double-sided electroplating is performed to fill hourglass-shaped via holes, then complete via filling is achieved, but the process complexity and cost increase

Engineering Contradiction:
Improvevia hole filling completenessVSAvoidelectroplating process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent inverts the conventional approach by creating tapered via holes that are wider at the bottom and narrower at the top, opposite to the traditional hourglass shape. This inverted geometry allows seed layer deposition and electroplating to be performed from a single side, eliminating the need for double-sided processing while ensuring complete via filling through the tapered structure that guides material deposition.

Inventive Principle:
Principle #13The other way round (Inversion)

3Area of moving object

If the via aperture is reduced to achieve finer pitch, then device integration density increases, but the difficulty of seed layer formation and via filling increases

Engineering Contradiction:
Improvevia aperture sizeVSAvoidseed layer formation difficulty
Core Design Contradiction:
Area of moving objectVSEase of manufacture

Solution Approach 1:

The patent applies local quality by creating via holes with non-uniform aperture sizes - smaller at the top and larger at the bottom. This local variation in geometry allows the via to maintain small overall dimensions for high integration density while having a enlarged bottom section that facilitates seed layer deposition and electroplating, making the manufacturing process easier despite the fine pitch requirements.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the risk of substrate breakage and simplifies the process, enhancing production efficiency and reducing costs by allowing for a more straightforward seed layer formation and electroplating process.

Implementation Method 1

depositing the conductive thin film on the first surface of the base substrate by adopting a magnetron sputtering process

Methodology Applied
Scientific EffectMagnetron sputtering: Sputtering

Implementation Method 2

removing a conductive thin film and an electroplated layer located on the first surface, and retaining a seed layer and an electroplated layer located in the blind via, wherein the electroplated layer located in the blind via is the connection electrode

Methodology Applied
Scientific EffectChemical physical polishing:

Implementation Method 3

forming an electroplated layer on the conductive thin film

Methodology Applied
Scientific EffectElectroplating: Electroplating

Implementation Method 4

thinning the base substrate along a direction from the second surface to the first surface

Methodology Applied
Scientific EffectChemical physical polishing:

Data Source

PatentUS12581979B2Substrate and preparation method thereof, integrated passive device, and electronic apparatus
Publication Date: 2026.03.17 BEIJING BOE OPTOELECTRONCIS TECH CO LTD
  • US12581979B2 patent drawing
  • US12581979B2 patent drawing
  • US12581979B2 patent drawing

AI summary

Provided are a substrate, a method for preparing the substrate, an integrated passive device, and an electronic apparatus. The method for preparing the substrate includes: providing a base substrate including at least one blind via, wherein the base substrate includes a first surface and a second surface disposed oppositely, a blind via extends from a first surface side to interior of the base substrate, and an aperture of the blind via gradually decreases in a direction from the first surface to the second surface; forming a connection electrode in the blind via; thinning the base substrate along a direction from the second surface to the first surface, wherein the blind via on the thinned base substrate forms a via hole penetrating the base substrate.