Glitch Power Analysis Using Bottleneck Ratios in Logic Circuits

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Solution Overview

Problem

Traditional glitch power analysis in circuit design is time-consuming and lacks incremental update capability, leading to impracticality in dynamic power optimization, with statistical approaches being less accurate and potentially counterproductive.

Innovation Solution

A dual glitch power analysis engine that combines annotation and statistical engines to calculate accurate glitch power values incrementally, using VCD files and bottleneck ratio calculations to identify and optimize glitch bottlenecks in circuit design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional glitch power analysis methods are used, then measurement precision is improved, but productivity deteriorates due to time-consuming analysis

Engineering Contradiction:
Improveglitch power measurement accuracyVSAvoidanalysis speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The analysis system is divided into two independent engines: an annotation engine that provides precise glitch power measurement and a statistical engine that provides fast estimation. Each engine operates independently and can be applied selectively based on design stage and accuracy requirements, resolving the contradiction between precision and speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The statistical engine performs partial analysis by focusing only on critical paths and bottleneck ratios rather than analyzing the entire circuit. This selective approach provides sufficient accuracy for most design decisions while dramatically reducing computation time compared to full annotation engine analysis.

Inventive Principle:
Principle #16Partial or excessive action

2Measurement precision

If traditional glitch power analysis is performed, then measurement precision is improved, but ease of operation worsens due to lack of incremental update capability

Engineering Contradiction:
Improveglitch power analysis accuracyVSAvoidincremental update capability
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The system transitions from static batch analysis to dynamic incremental analysis. The annotation engine can update glitch power measurements incrementally when circuit changes occur, and the statistical engine continuously monitors bottleneck ratios. This dynamic capability allows the analysis to adapt to design changes without requiring complete re-analysis, improving ease of operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements feedback mechanisms where the statistical engine continuously monitors circuit state and compares it against annotated baseline data. When changes exceed thresholds or bottleneck ratios indicate potential issues, the system triggers targeted annotation engine re-analysis, creating an efficient feedback loop that maintains accuracy while minimizing computational overhead.

Inventive Principle:
Principle #23Feedback

3Productivity

If statistical glitch power analysis is used, then productivity is improved through faster analysis, but measurement precision deteriorates

Engineering Contradiction:
Improveanalysis speedVSAvoidglitch power calculation accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The statistical engine performs partial analysis by focusing only on critical paths and bottleneck ratios rather than analyzing the entire circuit. This selective approach provides sufficient accuracy for most design decisions while dramatically reducing computation time compared to full annotation engine analysis.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The analysis system is divided into two independent engines: an annotation engine that provides precise glitch power measurement and a statistical engine that provides fast estimation. Each engine operates independently and can be applied selectively based on design stage and accuracy requirements, resolving the contradiction between precision and speed.

Inventive Principle:
Principle #1Segmentation

4Measurement precision

If comprehensive glitch power analysis is performed on all circuit elements, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveoverall glitch power accuracyVSAvoidanalysis system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The analysis system is divided into two independent engines: an annotation engine that provides precise glitch power measurement and a statistical engine that provides fast estimation. Each engine operates independently and can be applied selectively based on design stage and accuracy requirements, resolving the contradiction between precision and speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dual-engine system serves multiple functions: the annotation engine provides detailed analysis and baseline data, while the statistical engine provides continuous monitoring and fast estimation. This multi-functionality allows a single system to handle diverse analysis requirements without requiring separate tools, managing complexity while maintaining comprehensive capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11509303B2Glitch power analysis and optimization engine
Publication Date: 2022.11.22 SIEMENS INDUSTRY SOFTWARE INC
  • US11509303B2 patent drawing
  • US11509303B2 patent drawing
  • US11509303B2 patent drawing

AI summary

A switching activity report of simulated switching activities of a semiconductor circuit is accessed. A plurality of glitch bottleneck ratios corresponding to a plurality of pins in the semiconductor circuit are determined, comprising by: setting an initial bottleneck ratio on a leaf output pin; and backward traversing the semiconductor circuit to determine a plurality of glitch bottleneck ratios of pins in a fan-in cone of the leaf output pin.A plurality of total glitch powers associated with the plurality of pins is determined, a total glitch power of the plurality of total glitch powers being determined based on a glitch bottleneck ratio and a glitch power of a corresponding pin. One or more critical bottleneck pins among the plurality of pins are identified based on the plurality of total glitch powers. One or more gates associated with the one or more critical bottleneck pins are adjusted to reduce corresponding one or more total glitch powers of the one or more gates.