Global Shutter Pixel Failure Detection Using Bias Current Sensing
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Solution Overview
Problem
Global shutter image sensors used in automotive applications face challenges in detecting operational failures such as signal stuck low/high, signal transient faults, and under/over-voltage, which can lead to image quality degradation and unsafe vehicle operation, failing to meet the stringent ASIL D safety requirements.
Innovation Solution
A global shutter image sensor with a failure detection circuit that captures and compares first and second levels of pixel bias current to detect faults, using a sample and hold circuit and Schmitt triggers to generate a failure signal, and includes a self-test structure to ensure functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a global shutter image sensor is used for high-speed photography in automotive applications, then image quality and safety requirements are improved, but the risk of undetected pixel failures leading to image corruption increases
Solution Approach 1:
The patent implements preliminary failure detection by capturing pixel bias current levels before normal image operation. The failure detection circuit proactively measures current at the reference voltage node during dedicated detection periods, identifying potential pixel failures before they can corrupt image data. This preliminary action ensures that safety-critical image sensors meet ASIL D requirements by detecting faults before they affect image quality.
2Difficulty of detecting and measuring
If a failure detection circuit is added to detect pixel failures, then detection capability is improved, but device complexity increases
Solution Approach 1:
The failure detection circuit is designed to share existing infrastructure with normal image operation. It utilizes the same reference voltage node (Vref) that serves both pixel biasing during imaging and failure detection. The detection circuit integrates with existing pixel array architecture, using common transistors and nodes for dual purposes: normal image capture and failure detection, thereby minimizing additional complexity while achieving comprehensive monitoring.
Solution Approach 2:
The patent detects failures by monitoring changes in pixel bias current parameters. During failure detection mode, the circuit captures current levels at the reference voltage node and compares them against expected ranges. By transforming the detection problem into a parameter measurement task (current level comparison), the circuit achieves effective failure detection using simple threshold-based logic rather than complex analysis, reducing overall circuit complexity.
3Measurement precision
If pixel bias current is monitored continuously for failure detection, then failure detection accuracy is improved, but energy consumption increases
Solution Approach 1:
The failure detection circuit operates periodically rather than continuously. It captures pixel bias current levels at specific detection periods when the image sensor is not actively capturing images. The circuit switches between normal imaging mode and failure detection mode, measuring current at the reference voltage node only during dedicated detection windows. This periodic operation maintains detection accuracy by regularly monitoring for failures while significantly reducing energy consumption compared to continuous monitoring.
Data Source
AI summary
A global shutter image sensor with improved pixel failure coverage detects failures caused by the pixel chip of the image sensor. The global shutter image sensor includes a pixel chip including an array of photodiodes and associated logic, and a logic chip, bonded to the pixel chip, including an array of logic blocks for processing the images detected by the photodiodes. A failure detection circuit coupled to a reference voltage node of the image sensor detects a failure in the pixel chip by capturing a first level of pixel bias current and a second level of pixel bias current wherein a difference between the first level and the second level drives an output of the failure detection circuit either as logic high or as logic low.