Global Shutter Image Sensor With Single Source-Follower Readout
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Solution Overview
Problem
Conventional CMOS image sensors face challenges in efficiently performing global shutter operations with reduced pixel area and noise, as they typically require multiple transistors and capacitors, which can increase complexity and power consumption.
Innovation Solution
The implementation of an image sensor with a single source-follower transistor capable of performing both global dump and readout operations, utilizing a specific configuration of transistors and capacitors to minimize pixel area and enhance noise properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional pixel architectures are used for global shutter operations, then global shutter functionality is achieved, but pixel area increases and power consumption increases
Solution Approach 1:
The patent merges the global dump function and readout function into a single source-follower transistor. This transistor simultaneously performs both operations that traditionally required separate circuit elements, thereby reducing pixel area while maintaining global shutter functionality. The single transistor is configured to dump reset voltage and pixel voltage to capacitors during global shutter mode, and subsequently read out the stored voltages.
Solution Approach 2:
The source-follower transistor is designed with multi-functionality to perform both global dump operations and readout operations. By making this single transistor universal, the patent eliminates the need for additional dedicated transistors for each function, thus reducing overall pixel area while preserving adaptability for global shutter operations.
2Adaptability or versatility
If conventional pixel architectures are used for global shutter operations, then global shutter functionality is achieved, but power consumption increases
Solution Approach 1:
The patent combines multiple functions into a single source-follower transistor, reducing the total number of active components in the pixel circuit. Fewer transistors mean fewer sources of power consumption, thereby reducing overall power consumption while maintaining global shutter operation capability.
Solution Approach 2:
By designing the source-follower transistor to perform both global dump and readout functions, the patent reduces the number of transistor switches required. This multi-functional approach minimizes the active circuit elements that consume power, thus lowering overall power consumption while preserving adaptability.
3Area of stationary object
If pixel area is reduced for miniaturization, then miniaturization capability is improved, but global shutter operation becomes difficult
Solution Approach 1:
The patent successfully implements global shutter operation with reduced pixel area by merging the global dump and readout functions into a single source-follower transistor. This consolidation eliminates the need for additional transistors that would increase pixel area, thereby achieving miniaturization while preserving global shutter functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for a significant reduction in pixel area while maintaining excellent noise properties and enabling efficient global shutter operations, improving the overall performance of the image sensor.
Implementation Method 1
a first transfer transistor connected between a first photodiode and a floating diffusion node
Data Source
AI summary
An image sensor including: first and second capacitors; a first transistor between a photodiode and a floating diffusion node, and receiving a transfer signal; a second transistor between a first power terminal and the floating diffusion node and receiving a reset signal; a third transistor between a second power terminal and a first node and having a gate connected to the floating diffusion node; a fourth transistor between the first node and a column line and receiving a precharge signal; a fifth transistor between the first capacitor and a feedback node and receiving a first sampling signal; a sixth transistor between the second capacitor and feedback node and receiving a second sampling signal; a seventh transistor between the first node and feedback node and receiving a first switch signal; and an eighth transistor between the floating diffusion and feedback nodes and receiving a second switch signal.