Global Statistical Optimization for Analog Circuit Yield
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current design tools for analog, mixed-signal, and custom digital electrical circuits face challenges in optimizing yield and performance due to high-dimensional design spaces with nonlinear interactions, leading to inefficiencies in simulating and optimizing device sizes across various process and environmental conditions.
Innovation Solution
The development of global statistical optimization (GSO), global statistical characterization (GSC), and global statistical design (GSD) tools, which enable automated sizing, characterization, and design optimization across entire design spaces, incorporating techniques like structural homotopy and model-building optimization to handle hundreds of variables with no simplifying assumptions, and provide interactive visualization for designers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional simulation tools are used to evaluate circuit performance across all design variables and environmental conditions, then measurement precision and reliability are improved, but loss of time and productivity deteriorate due to the extremely large design space
Solution Approach 1:
The patent segments the evaluation process into two distinct phases: (1) a screening phase using fast surrogate models to evaluate all design variables across environmental conditions, and (2) a detailed verification phase using full circuit simulation only for selected promising designs. This segmentation allows most evaluations to use efficient approximations while maintaining accuracy for final decisions, resolving the contradiction between comprehensive evaluation and time consumption
Solution Approach 2:
The patent performs preliminary action by pre-computing surrogate models that capture the essential behavior of the circuit across environmental conditions before the actual optimization process. These pre-computed models enable rapid evaluation during the design space exploration, eliminating the need to run full simulations for every evaluation point and thus reducing simulation time while preserving measurement precision
2Manufacturing precision
If the complete design space with all design variables and environmental conditions is evaluated, then manufacturing precision and yield are improved, but device complexity and difficulty of detecting and measuring increase
Solution Approach 1:
The patent segments the design variables into different categories and applies different evaluation strategies: surrogate models handle the high-dimensional exploration of all variables, while full simulation verifies only the critical designs. This segmentation makes the complex design space manageable by applying appropriate computational methods to different subsets of the problem
Solution Approach 2:
The patent introduces surrogate models as intermediary representations that capture the relationship between design variables, environmental conditions, and circuit performance without requiring direct simulation. These intermediaries simplify the complex design space by providing approximate but sufficiently accurate models that enable yield evaluation without exhaustive simulation
3Ease of operation
If traditional optimization tools are used without considering environmental variability, then ease of operation is improved, but reliability and manufacturing precision deteriorate due to insufficient yield optimization
Solution Approach 1:
The patent applies dynamics by making the optimization process adaptive to environmental conditions. The surrogate models are constructed to capture environmental variability, and the optimization algorithm dynamically adjusts design recommendations based on the predicted performance across different environmental scenarios. This dynamic approach maintains ease of operation while significantly improving reliability and yield compared to static optimization methods
4Measurement precision
If detailed circuit simulation is performed for every candidate design at all environmental corners, then measurement precision is improved, but productivity and loss of time worsen
Solution Approach 1:
The patent segments the evaluation workflow into a fast screening stage using surrogate models and a slow verification stage using detailed simulation. The surrogate models evaluate thousands of candidate designs rapidly to identify promising regions, while detailed simulation is reserved for final verification of selected designs. This segmentation enables high productivity in design exploration while maintaining measurement precision for critical decisions
Solution Approach 2:
The patent applies partial action by performing detailed simulation only partially - specifically, only for the subset of designs that pass the surrogate model screening. Most candidate designs are evaluated using the faster surrogate models, which provides sufficient information for design space exploration. This partial application of detailed simulation maintains productivity while preserving measurement precision where it matters most
Data Source
AI summary
For application to analog, mixed-signal, and custom digital circuits, a system and method to do: global statistical optimization (GSO), global statistical characterization (GSC), global statistical design (GSD), and block-specific design. GSO can perform global yield optimization on hundreds of variables, with no simplifying assumptions. GSC can capture and display mappings from design variables to performance, across the whole design space. GSC can handle hundreds of design variables in a reasonable time frame, e.g., in less than a day, for a reasonable number of simulations, e.g., less than 100,000. GSC can capture design variable interactions and other possible nonlinearities, explicitly capture uncertainties, and intuitively display them. GSD can support the user's exploration of design-to-performance mappings with fast feedback, thoroughly capturing design variable interactions in the whole space, and allow for more efficiently created, more optimal designs. Block-specific design should make it simple to design small circuit blocks, in less time and with lower overhead than optimization through optimization.