Global Wordline Bias Control for Memory Read State Transitions
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Solution Overview
Problem
Memory devices experience increased bit error rates due to charge loss and voltage distribution shifts over time, leading to sub-optimal read operations and errors, particularly during transitions between transient and stable states, which are exacerbated by temperature and power-off durations.
Innovation Solution
Implementing global wordline bias voltages controlled by a controller based on temperature and standby time to manage transitions between transient and stable states, using discrete or continuous methods to optimize transition times and reduce bit errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory devices operate without global wordline bias voltages, then device complexity is reduced, but bit error rates increase due to charge loss and voltage distribution shifts during state transitions
Solution Approach 1:
The controller determines whether to apply a positive bias voltage to the global wordline before a read operation based on temperature and standby time conditions. This preliminary action prevents charge loss and voltage distribution shifts before they occur during state transitions, thereby reducing bit error rates without requiring continuous monitoring during operations
Solution Approach 2:
The patent applies a positive bias voltage to the global wordline under specific conditions (temperature above threshold and standby time above threshold) to shift the voltage distribution and prevent charge loss. This parameter change in the electrical state of the global wordline maintains reliable read operations during transient to stable state transitions without requiring structural modifications to the memory device
2Reliability
If positive bias voltage is applied to global wordline during all conditions, then bit errors are reduced during state transitions, but charge gain occurs in erased state memory cells
Solution Approach 1:
The patent dynamically adjusts the bias voltage applied to the global wordline based on real-time temperature and standby time conditions. The controller transitions between applying positive bias voltage (when temperature and standby time exceed thresholds) and ground voltage (otherwise), creating a dynamic control scheme that prevents both bit errors during state transitions and charge gain in erased cells. This dynamic approach allows the system to adapt to varying operating conditions without fixed biasing
Solution Approach 2:
The patent replaces continuous physical monitoring and adjustment mechanisms with a simplified control logic that uses temperature sensors and standby time tracking to determine bias voltage application. This substitution of a complex continuous control system with a discrete threshold-based control system reduces overall device complexity while maintaining reliability
3Reliability
If temperature and standby time monitoring is implemented, then optimal bias voltage application is achieved, but device complexity and power consumption increase
Solution Approach 1:
The controller leverages existing temperature sensing capabilities and standby time tracking functions already present in modern memory systems, making them serve the additional purpose of determining global wordline bias voltage application. This multi-functional use of existing components avoids adding dedicated hardware for bias voltage control, thereby maintaining reliability while minimizing increases in device complexity and power consumption
Data Source
AI summary
A memory device includes a memory array and control logic, operatively coupled to the memory array, to perform operations including identifying a set of parameters related to the memory device, selecting, based on the set of parameters, a magnitude of a bias voltage to be applied to a global wordline during a read state transition of a block of the memory device from a transient state to a stable state, and causing the bias voltage to be applied to the global wordline.