Graph Neural Network Cell-Level Memory Analysis
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Solution Overview
Problem
Existing studies on NAND flash memory reliability and safety analyze data at the block or device level, failing to evaluate the reliability and safety of each cell individually, particularly in three-dimensional structures where temperature variations cause significant shifts in threshold voltage distributions, leading to data corruption.
Innovation Solution
A cell-level analysis method using a graph neural network is employed to analyze memory characteristics at the cell level. This method involves acquiring cell location information, generating graph-structured data, and training a graph neural network model to predict electrical characteristics, such as threshold voltage, and program verify levels of target cells, thereby minimizing cross-temperature effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If data analysis is performed at block or device level, then processing complexity is reduced, but cell-level reliability and safety evaluation capability deteriorates
Solution Approach 1:
The patent segments the memory device into individual cell units, creating separate analysis modules for each cell. This allows cell-level reliability evaluation while maintaining manageable processing complexity through modular architecture. Each cell's threshold voltage data is processed independently through dedicated neural network pathways.
Solution Approach 2:
The patent introduces a graph neural network as an intermediary between raw threshold voltage data and reliability evaluation results. This intermediary layer processes cell-level data efficiently, transforming complex cell-level measurements into reliable safety evaluations without requiring direct complex processing of all cell data simultaneously.
2Measurement precision
If cell-level analysis is implemented, then reliability and safety evaluation accuracy is improved, but processing complexity increases
Solution Approach 1:
The patent replaces traditional mechanical or statistical processing methods with a graph neural network-based computational system. This substitution enables efficient cell-level analysis by using learned patterns from training data, reducing the computational burden compared to exhaustive cell-level processing while maintaining high reliability evaluation accuracy.
Solution Approach 2:
The patent performs preliminary training of the graph neural network model using comprehensive cell-level data before actual reliability evaluation. This preliminary action pre-computes optimal processing pathways and patterns, so that during actual operation, cell-level analysis can be performed efficiently with reduced processing complexity while maintaining high accuracy.
3Ease of operation
If threshold voltage distribution shift is not corrected, then device operation is simplified, but data stability deteriorates
Solution Approach 1:
The patent implements feedback mechanisms that monitor threshold voltage distribution shifts in real-time. When shifts are detected, the system automatically adjusts programming parameters or applies correction algorithms, maintaining data stability without complicating the overall device operation. The feedback loop operates transparently, preserving ease of use while ensuring stability.
Solution Approach 2:
The patent dynamically changes programming and verification parameters based on detected threshold voltage distribution shifts. By adjusting voltage levels, timing parameters, or programming pulses in response to temperature-induced shifts, the system maintains data stability across varying conditions while keeping the user interface and basic operation simple and unchanged.
Data Source
AI summary
Disclosed are a cell-level analysis method of a memory and a computing device for performing the same. The cell-level analysis method of a memory is a cell-level analysis method of a memory that is executed in a computing device including one or more processors and a memory storing one or more programs executed by the one or more processors, the cell-level analysis method including acquiring information on a location of each cell in the memory, generating graph-structured data for a target cell based on the location of each cell in the memory, and training a graph neural network model to predict one or more of an electrical characteristic of the target cell and a program and verify level (PV level) of the target cell by inputting the graph-structured data into the graph neural network model.